{"title":"描述高级设计的速度无关性","authors":"M. Kishinevsky, J. Staunstrup","doi":"10.1109/ASYNC.1994.656285","DOIUrl":null,"url":null,"abstract":"This paper characterizes the speed-independence of high-level designs. The characterization is a condition on the design description ensuring that the behavior of the design is independent of the speeds of its components. The behavior of a circuit is modeled as a transition system, that allows data types, and internal as well as external non-determinism. This makes it possible to verify the speed-independence of a design without providing an explicit realization of the environment. The verification can be done mechanically. A number of experimental designs have been verified including a speed-independent RAM, a complex switch of a data path, various Muller C-elements, FIFO registers, and counters.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Characterizing speed-independence of high-level designs\",\"authors\":\"M. Kishinevsky, J. Staunstrup\",\"doi\":\"10.1109/ASYNC.1994.656285\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper characterizes the speed-independence of high-level designs. The characterization is a condition on the design description ensuring that the behavior of the design is independent of the speeds of its components. The behavior of a circuit is modeled as a transition system, that allows data types, and internal as well as external non-determinism. This makes it possible to verify the speed-independence of a design without providing an explicit realization of the environment. The verification can be done mechanically. A number of experimental designs have been verified including a speed-independent RAM, a complex switch of a data path, various Muller C-elements, FIFO registers, and counters.\",\"PeriodicalId\":114048,\"journal\":{\"name\":\"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASYNC.1994.656285\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASYNC.1994.656285","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
摘要
本文描述了高级设计的速度无关性。特性描述是设计描述的一个条件,确保设计的行为与组件的速度无关。电路的行为被建模为一个转换系统,它允许数据类型,以及内部和外部的非确定性。这使得在不提供环境的显式实现的情况下验证设计的速度独立性成为可能。验证可以机械地完成。已经验证了许多实验设计,包括速度无关的RAM,数据路径的复杂开关,各种Muller c -元件,FIFO寄存器和计数器。
Characterizing speed-independence of high-level designs
This paper characterizes the speed-independence of high-level designs. The characterization is a condition on the design description ensuring that the behavior of the design is independent of the speeds of its components. The behavior of a circuit is modeled as a transition system, that allows data types, and internal as well as external non-determinism. This makes it possible to verify the speed-independence of a design without providing an explicit realization of the environment. The verification can be done mechanically. A number of experimental designs have been verified including a speed-independent RAM, a complex switch of a data path, various Muller C-elements, FIFO registers, and counters.