高性能陶瓷多芯片模块封装中的垂直差分对布线

Franklin Baez, Peter Van Dyke, Christopher Spring
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引用次数: 1

摘要

我们描述了一种在高性能多芯片模块陶瓷封装中垂直层布线差分对的方法。通过将这些垂直差分对的阻抗与传统差分对的阻抗相匹配,并采用有效地将这些对与噪声干扰隔离开来的配电拓扑结构,路由性能提高了17%,同时开关噪声降低了60%。本文所述方法已成功应用于IBM陶瓷多芯片模块(MCM)封装的设计中,该封装具有良好的电气性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Vertical Differential Pair Routing in High Performance Ceramic Multi-chip Module Packages
We describe a methodology to route differential pairs in vertical layers in a high performance multi-chip module ceramic package. By matching the impedance of these vertical differential pairs to their conventional counterparts and adopting a power distribution topology that effectively isolates these pairs from noise aggressors, routing was improved by 17% and simultaneous switching noise decreased by 60%. The methods described in this paper were applied successfully in the design of an IBM ceramic multi-chip module (MCM) package with good electrical performance.
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