{"title":"同时双向PAM-4链接内置自检","authors":"M. Hsieh, G. Sobelman","doi":"10.1109/SOCC.2004.1362426","DOIUrl":null,"url":null,"abstract":"This paper presents a new design of a simultaneous bidirectional PAM-4 wired transmission system that uses built-in self-test (BIST) to adjust the level of pre-emphasis that is applied. The BIST circuitry consists of a pattern generator and detector, a signal comparator and a high-pass filter. It outputs an error indicator that is used as a control signal in the adaptive pre-emphasis block. The feedback loop inherent in a simultaneous bidirectional link provides a natural opportunity to carry information about the channel characteristics without the need for an extra dedicated wire. The design has been verified using the Cadence SpectreRF and Verilog-A simulators and the channel loss characteristics are based on an FR-4 material model extracted from the Cadence Transmission Line Model Generator.","PeriodicalId":184894,"journal":{"name":"IEEE International SOC Conference, 2004. Proceedings.","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Simultaneous bidirectional PAM-4 link with built-in self-test\",\"authors\":\"M. Hsieh, G. Sobelman\",\"doi\":\"10.1109/SOCC.2004.1362426\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new design of a simultaneous bidirectional PAM-4 wired transmission system that uses built-in self-test (BIST) to adjust the level of pre-emphasis that is applied. The BIST circuitry consists of a pattern generator and detector, a signal comparator and a high-pass filter. It outputs an error indicator that is used as a control signal in the adaptive pre-emphasis block. The feedback loop inherent in a simultaneous bidirectional link provides a natural opportunity to carry information about the channel characteristics without the need for an extra dedicated wire. The design has been verified using the Cadence SpectreRF and Verilog-A simulators and the channel loss characteristics are based on an FR-4 material model extracted from the Cadence Transmission Line Model Generator.\",\"PeriodicalId\":184894,\"journal\":{\"name\":\"IEEE International SOC Conference, 2004. Proceedings.\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International SOC Conference, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2004.1362426\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International SOC Conference, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2004.1362426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simultaneous bidirectional PAM-4 link with built-in self-test
This paper presents a new design of a simultaneous bidirectional PAM-4 wired transmission system that uses built-in self-test (BIST) to adjust the level of pre-emphasis that is applied. The BIST circuitry consists of a pattern generator and detector, a signal comparator and a high-pass filter. It outputs an error indicator that is used as a control signal in the adaptive pre-emphasis block. The feedback loop inherent in a simultaneous bidirectional link provides a natural opportunity to carry information about the channel characteristics without the need for an extra dedicated wire. The design has been verified using the Cadence SpectreRF and Verilog-A simulators and the channel loss characteristics are based on an FR-4 material model extracted from the Cadence Transmission Line Model Generator.