Anindita Chakraborty, Rakesh Das, Chandan Bandyopadhyay, H. Rahaman
{"title":"基于BDD的高速忆阻电路设计综合技术","authors":"Anindita Chakraborty, Rakesh Das, Chandan Bandyopadhyay, H. Rahaman","doi":"10.1109/ISVDAT.2016.8064842","DOIUrl":null,"url":null,"abstract":"Recently, a passive device — memristor has received wide attention in nano-scale design due to its applications in the area of nanoelectronic memory design, neuromorphic computing and logic design. This passive element is non-volatile in nature and has dual properties of memory and resistor. In recent time, the application of this device in designing high speed logic circuits has now opened a new research domain in nano-scale design. This work presents an efficient design technique implementing logic functions using memristor. The proposed design methodology not only speed-up the response time of the circuits but can also deal with functions with larger input size (beyond 100 variables). Our entire design scheme is divided in two phases. In the first phase, we use Binary Decision Diagrams (BDDs) to represent input logic functions and in second phase, a technology mapping is performed that generates memristor based circuits corresponding to this BDD graphs. Comparative analysis with existing works is given and we find that our design steadily improves the average performance of circuits.","PeriodicalId":301815,"journal":{"name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"BDD based synthesis technique for design of high-speed memristor based circuits\",\"authors\":\"Anindita Chakraborty, Rakesh Das, Chandan Bandyopadhyay, H. Rahaman\",\"doi\":\"10.1109/ISVDAT.2016.8064842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recently, a passive device — memristor has received wide attention in nano-scale design due to its applications in the area of nanoelectronic memory design, neuromorphic computing and logic design. This passive element is non-volatile in nature and has dual properties of memory and resistor. In recent time, the application of this device in designing high speed logic circuits has now opened a new research domain in nano-scale design. This work presents an efficient design technique implementing logic functions using memristor. The proposed design methodology not only speed-up the response time of the circuits but can also deal with functions with larger input size (beyond 100 variables). Our entire design scheme is divided in two phases. In the first phase, we use Binary Decision Diagrams (BDDs) to represent input logic functions and in second phase, a technology mapping is performed that generates memristor based circuits corresponding to this BDD graphs. Comparative analysis with existing works is given and we find that our design steadily improves the average performance of circuits.\",\"PeriodicalId\":301815,\"journal\":{\"name\":\"2016 20th International Symposium on VLSI Design and Test (VDAT)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 20th International Symposium on VLSI Design and Test (VDAT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVDAT.2016.8064842\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 20th International Symposium on VLSI Design and Test (VDAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVDAT.2016.8064842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
BDD based synthesis technique for design of high-speed memristor based circuits
Recently, a passive device — memristor has received wide attention in nano-scale design due to its applications in the area of nanoelectronic memory design, neuromorphic computing and logic design. This passive element is non-volatile in nature and has dual properties of memory and resistor. In recent time, the application of this device in designing high speed logic circuits has now opened a new research domain in nano-scale design. This work presents an efficient design technique implementing logic functions using memristor. The proposed design methodology not only speed-up the response time of the circuits but can also deal with functions with larger input size (beyond 100 variables). Our entire design scheme is divided in two phases. In the first phase, we use Binary Decision Diagrams (BDDs) to represent input logic functions and in second phase, a technology mapping is performed that generates memristor based circuits corresponding to this BDD graphs. Comparative analysis with existing works is given and we find that our design steadily improves the average performance of circuits.