首次演示了1厘米/ 1倍/ 1厘米SiC晶闸管芯片

Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005. Pub Date : 2005-05-23 DOI:10.1109/ISPSD.2005.1487984

A. Agarwal, B. Damsky, J. Richmond, S. Krishnaswami, C. Capell, S. Ryu, J. Palmour

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引用次数: 13

摘要

我们报告了第一个能够处理1770 V的1cm /spl次/ 1cm SiC晶闸管芯片的开发。这证明了SiC衬底和外延材料的现有质量。在100 A和200/spl度/C下测量了4 V的正向降。发现导通延迟是门电流的一个强函数。在栅极电流为1.5 a时，观察到阳极到阴极电流的导通延迟为72 ns, I/sub AK/=10 a。导通上升时间是阳极到阴极电压V/sub AK/的强烈函数。在V/sub AK/=500 V时，当I/sub AK/=10 A时，导通上升时间为26 ns。

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The first demonstration of the 1 cm /spl times/ 1 cm SiC thyristor chip

We report on the development of the first 1 cm /spl times/ 1 cm SiC thyristor chip capable of handling 1770 V. This demonstrates the present quality of the SiC substrate and epitaxial material. A forward drop of 4 V at 100 A and 200/spl deg/C was measured. The turn-on delay is found to be a strong function of the gate current. At a gate current of 1.5 A, the turn-on delay of 72 ns is observed for anode to cathode current, I/sub AK/=10 A. The turn-on rise time is a strong function of the anode to cathode voltage, V/sub AK/. At V/sub AK/=500 V, the turn-on rise time was 26 ns for I/sub AK/=10 A.

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Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.

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