Yun Shi, R. Rassel, R. Phelps, P. Candra, D. Hershberger, X. Tian, S. Sweeney, J. Rascoe, B. Rainey, J. Dunn, D. Harame
{"title":"一种具有成本竞争力的高性能CMOS结场效应管(JFET)，适用于射频和模拟应用","authors":"Yun Shi, R. Rassel, R. Phelps, P. Candra, D. Hershberger, X. Tian, S. Sweeney, J. Rascoe, B. Rainey, J. Dunn, D. Harame","doi":"10.1109/RFIC.2010.5477348","DOIUrl":null,"url":null,"abstract":"in this paper, we present a cost-effective JFET integrated in 0.18µm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on Ron and Voff is further discussed, providing the insights and guidelines for JFET optimization. Besides the superior flicker noise (1/f noise) characteristics, this JFET device also demonstrates promising RF characteristics such as maximum frequency, linearity, power handling capability, power-added efficiency, indicating a good candidate for RF designs.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A cost-competitive high performance Junction-FET (JFET) in CMOS process for RF & analog applications\",\"authors\":\"Yun Shi, R. Rassel, R. Phelps, P. Candra, D. Hershberger, X. Tian, S. Sweeney, J. Rascoe, B. Rainey, J. Dunn, D. Harame\",\"doi\":\"10.1109/RFIC.2010.5477348\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"in this paper, we present a cost-effective JFET integrated in 0.18µm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on Ron and Voff is further discussed, providing the insights and guidelines for JFET optimization. Besides the superior flicker noise (1/f noise) characteristics, this JFET device also demonstrates promising RF characteristics such as maximum frequency, linearity, power handling capability, power-added efficiency, indicating a good candidate for RF designs.\",\"PeriodicalId\":269027,\"journal\":{\"name\":\"2010 IEEE Radio Frequency Integrated Circuits Symposium\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE Radio Frequency Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2010.5477348\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2010.5477348","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A cost-competitive high performance Junction-FET (JFET) in CMOS process for RF & analog applications
in this paper, we present a cost-effective JFET integrated in 0.18µm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on Ron and Voff is further discussed, providing the insights and guidelines for JFET optimization. Besides the superior flicker noise (1/f noise) characteristics, this JFET device also demonstrates promising RF characteristics such as maximum frequency, linearity, power handling capability, power-added efficiency, indicating a good candidate for RF designs.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
