{"title":"深垂直互联接入故障隔离新技术","authors":"T. P. Chua, C. H. Chong, K. Liew","doi":"10.1109/IPFA.2014.6898143","DOIUrl":null,"url":null,"abstract":"Deep Vertical Interconnect Access (DVIA) was developed in the semiconductor industry for high performance technique which used to create advanced packages and advance integrated circuits. With its physically large diameter (~15um)and depth (~60um) substantial hours will be needed to mill entire DVI using Focosed Ion Beam (FIB) upon locating the failing DVIA. Thermally Induced Voltage Alterations (TIVA) technique has demonstrated significant capability for DVIA fault isolation. We had successfully narrow down failing DVIA inspection area to ~10um and manage to reduce FIB usage time from 4hrs to 2hrs. Save 50% on FIB usage time with novel technique for DVIA fault isolation.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Novel technique for deep vertical interconnect access fault isolation\",\"authors\":\"T. P. Chua, C. H. Chong, K. Liew\",\"doi\":\"10.1109/IPFA.2014.6898143\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Deep Vertical Interconnect Access (DVIA) was developed in the semiconductor industry for high performance technique which used to create advanced packages and advance integrated circuits. With its physically large diameter (~15um)and depth (~60um) substantial hours will be needed to mill entire DVI using Focosed Ion Beam (FIB) upon locating the failing DVIA. Thermally Induced Voltage Alterations (TIVA) technique has demonstrated significant capability for DVIA fault isolation. We had successfully narrow down failing DVIA inspection area to ~10um and manage to reduce FIB usage time from 4hrs to 2hrs. Save 50% on FIB usage time with novel technique for DVIA fault isolation.\",\"PeriodicalId\":409316,\"journal\":{\"name\":\"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2014.6898143\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2014.6898143","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Novel technique for deep vertical interconnect access fault isolation
Deep Vertical Interconnect Access (DVIA) was developed in the semiconductor industry for high performance technique which used to create advanced packages and advance integrated circuits. With its physically large diameter (~15um)and depth (~60um) substantial hours will be needed to mill entire DVI using Focosed Ion Beam (FIB) upon locating the failing DVIA. Thermally Induced Voltage Alterations (TIVA) technique has demonstrated significant capability for DVIA fault isolation. We had successfully narrow down failing DVIA inspection area to ~10um and manage to reduce FIB usage time from 4hrs to 2hrs. Save 50% on FIB usage time with novel technique for DVIA fault isolation.