{"title":"电子封装技术进步到温度高达500/spl℃","authors":"R. Grzybowski","doi":"10.1109/HTEMDS.1998.730699","DOIUrl":null,"url":null,"abstract":"Advances in SOI IC technology and development of wide band gap semiconductors such as SiC are enabling practical deployment of high temperature electronics. While ICs are key to the realization of complete high temperature electronic systems, passive components, including resistors, capacitors, magnetics and crystals, are also required. Electronic components from all of these categories exist to varying degrees for temperatures up to 500/spl deg/C. However, one of the greatest hindrances to making individual components more reliable is their packaging. Similarly, one of the greatest hindrances to integrating individual components together into a system is the understanding of harsh environment packaging techniques and materials selection. This paper addresses electronics packaging for harsh environment applications for a variety of packaging levels. We begin by looking at common failure mechanisms associated with packaging microcircuits at the IC die level as well as packaging means for individual passive components. With these failure mechanisms identified, we consider alternate materials selections and fabrication approaches that permit electronic systems to be packaged for much higher temperature operating environments than are generally possible with traditional methods. We also examine packaging options at the PWB level, including high temperature substrate materials, interconnect metallization, solders and braze materials.","PeriodicalId":197749,"journal":{"name":"1998 High-Temperature Electronic Materials, Devices and Sensors Conference (Cat. No.98EX132)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"Advances in electronic packaging technologies to temperatures as high as 500/spl deg/C\",\"authors\":\"R. Grzybowski\",\"doi\":\"10.1109/HTEMDS.1998.730699\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Advances in SOI IC technology and development of wide band gap semiconductors such as SiC are enabling practical deployment of high temperature electronics. While ICs are key to the realization of complete high temperature electronic systems, passive components, including resistors, capacitors, magnetics and crystals, are also required. Electronic components from all of these categories exist to varying degrees for temperatures up to 500/spl deg/C. However, one of the greatest hindrances to making individual components more reliable is their packaging. Similarly, one of the greatest hindrances to integrating individual components together into a system is the understanding of harsh environment packaging techniques and materials selection. This paper addresses electronics packaging for harsh environment applications for a variety of packaging levels. We begin by looking at common failure mechanisms associated with packaging microcircuits at the IC die level as well as packaging means for individual passive components. With these failure mechanisms identified, we consider alternate materials selections and fabrication approaches that permit electronic systems to be packaged for much higher temperature operating environments than are generally possible with traditional methods. We also examine packaging options at the PWB level, including high temperature substrate materials, interconnect metallization, solders and braze materials.\",\"PeriodicalId\":197749,\"journal\":{\"name\":\"1998 High-Temperature Electronic Materials, Devices and Sensors Conference (Cat. No.98EX132)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-02-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 High-Temperature Electronic Materials, Devices and Sensors Conference (Cat. No.98EX132)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HTEMDS.1998.730699\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 High-Temperature Electronic Materials, Devices and Sensors Conference (Cat. No.98EX132)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HTEMDS.1998.730699","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Advances in electronic packaging technologies to temperatures as high as 500/spl deg/C
Advances in SOI IC technology and development of wide band gap semiconductors such as SiC are enabling practical deployment of high temperature electronics. While ICs are key to the realization of complete high temperature electronic systems, passive components, including resistors, capacitors, magnetics and crystals, are also required. Electronic components from all of these categories exist to varying degrees for temperatures up to 500/spl deg/C. However, one of the greatest hindrances to making individual components more reliable is their packaging. Similarly, one of the greatest hindrances to integrating individual components together into a system is the understanding of harsh environment packaging techniques and materials selection. This paper addresses electronics packaging for harsh environment applications for a variety of packaging levels. We begin by looking at common failure mechanisms associated with packaging microcircuits at the IC die level as well as packaging means for individual passive components. With these failure mechanisms identified, we consider alternate materials selections and fabrication approaches that permit electronic systems to be packaged for much higher temperature operating environments than are generally possible with traditional methods. We also examine packaging options at the PWB level, including high temperature substrate materials, interconnect metallization, solders and braze materials.