对功率敏感的多线程架构

J. Seng, D. Tullsen, George Z. N. Cai
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引用次数: 15

摘要

微处理器的功耗在设计决策中变得越来越重要,不仅在移动处理器中,现在在高性能处理器中也是如此。因此,功耗意识设计必须超越技术和底层设计,还必须改变现代处理器的架构方式。多线程处理器在低功耗或功耗受限的设备中很有吸引力,其原因与实现高吞吐量的原因相同。首先,它通过多个线程提供额外的并行性,允许处理器更少地依赖推测。我们表明,与单线程架构相比,同步多线程处理器每条指令消耗的能量最多可减少22%。我们还探讨了多线程体系结构特有的其他功率优化,因为它们对于单线程体系结构不可用或不合理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Power-sensitive multithreaded architecture
The power consumption of microprocessors is becoming increasingly important in design decisions, not only in mobile processors, but also now in high-performance processors. Power-conscious design must therefore go beyond technology and low-level design, but also change the way modern processors are architected. A multithreading processor is attractive in the context of low-power or power-constrained devices for many of the same reasons that enable its high throughput. Primarily, it supplies extra parallelism via multiple threads, allowing the processor to rely much less heavily on speculation. We show that a simultaneous multithreading processor utilizes up to 22% less energy per instruction than a single-threaded architecture. We also explore other power optimizations that are particular to multithreaded architectures, either because they are unavailable to or unreasonable for single-thread architectures.
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