{"title":"CMOS可调谐电流放大器的设计","authors":"K. Kaewdang, W. Surakampontom, N. Fujii","doi":"10.1109/ISCIT.2004.1412899","DOIUrl":null,"url":null,"abstract":"Two CMOS tunable current amplifiers are proposed in this paper. They are voltage-controlled current gain and current-controlled current gain. Both circuits are designed based on CMOS OTA which are linearly tunable. The circuits achieve their linearity by squaring the nonlinear transconductance of the balanced CMOS OTA. The proposed voltage-controlled current amplifier can be linearly tuned by DC voltage. The amplifier's nonlinearity is less than 1% for the voltage control (V/sub c/) range from -2V to 2V. The current-controlled current amplifier can also have a linearly tunable current gain by DC bias current over three decades (0.1-20) with an error less than 1.5%. The performance of the proposed circuit is discussed and confirmed through PSPICE simulation.","PeriodicalId":237047,"journal":{"name":"IEEE International Symposium on Communications and Information Technology, 2004. ISCIT 2004.","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A design of CMOS tunable current amplifiers\",\"authors\":\"K. Kaewdang, W. Surakampontom, N. Fujii\",\"doi\":\"10.1109/ISCIT.2004.1412899\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two CMOS tunable current amplifiers are proposed in this paper. They are voltage-controlled current gain and current-controlled current gain. Both circuits are designed based on CMOS OTA which are linearly tunable. The circuits achieve their linearity by squaring the nonlinear transconductance of the balanced CMOS OTA. The proposed voltage-controlled current amplifier can be linearly tuned by DC voltage. The amplifier's nonlinearity is less than 1% for the voltage control (V/sub c/) range from -2V to 2V. The current-controlled current amplifier can also have a linearly tunable current gain by DC bias current over three decades (0.1-20) with an error less than 1.5%. The performance of the proposed circuit is discussed and confirmed through PSPICE simulation.\",\"PeriodicalId\":237047,\"journal\":{\"name\":\"IEEE International Symposium on Communications and Information Technology, 2004. ISCIT 2004.\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Symposium on Communications and Information Technology, 2004. ISCIT 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCIT.2004.1412899\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Communications and Information Technology, 2004. ISCIT 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCIT.2004.1412899","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Two CMOS tunable current amplifiers are proposed in this paper. They are voltage-controlled current gain and current-controlled current gain. Both circuits are designed based on CMOS OTA which are linearly tunable. The circuits achieve their linearity by squaring the nonlinear transconductance of the balanced CMOS OTA. The proposed voltage-controlled current amplifier can be linearly tuned by DC voltage. The amplifier's nonlinearity is less than 1% for the voltage control (V/sub c/) range from -2V to 2V. The current-controlled current amplifier can also have a linearly tunable current gain by DC bias current over three decades (0.1-20) with an error less than 1.5%. The performance of the proposed circuit is discussed and confirmed through PSPICE simulation.