M. Katoozi, E. Cannon, T. Dao, K. Aitken, S. Fischer, T. Amort, R. Brees, J. Tostenrude
{"title":"数字集成电路可靠性仿真的年龄感知库","authors":"M. Katoozi, E. Cannon, T. Dao, K. Aitken, S. Fischer, T. Amort, R. Brees, J. Tostenrude","doi":"10.1109/IRPS.2013.6531973","DOIUrl":null,"url":null,"abstract":"A general method for creating an age-aware library of cells, including the impact of multiple reliability degradation mechanisms, is presented. The underlying degradation models take into account key reliability-impacting parameters such as input slew rate, output load, signal toggle rate, signal activity factor, output buffer size and age. A framework for using this age-aware library to analyze the aging of digital Integrated Circuit (IC) timing performance using existing Electronic Design Automation (EDA) methodologies is also discussed.","PeriodicalId":138206,"journal":{"name":"2013 IEEE International Reliability Physics Symposium (IRPS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An age-aware library for reliability simulation of digital ICs\",\"authors\":\"M. Katoozi, E. Cannon, T. Dao, K. Aitken, S. Fischer, T. Amort, R. Brees, J. Tostenrude\",\"doi\":\"10.1109/IRPS.2013.6531973\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A general method for creating an age-aware library of cells, including the impact of multiple reliability degradation mechanisms, is presented. The underlying degradation models take into account key reliability-impacting parameters such as input slew rate, output load, signal toggle rate, signal activity factor, output buffer size and age. A framework for using this age-aware library to analyze the aging of digital Integrated Circuit (IC) timing performance using existing Electronic Design Automation (EDA) methodologies is also discussed.\",\"PeriodicalId\":138206,\"journal\":{\"name\":\"2013 IEEE International Reliability Physics Symposium (IRPS)\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Reliability Physics Symposium (IRPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2013.6531973\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2013.6531973","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An age-aware library for reliability simulation of digital ICs
A general method for creating an age-aware library of cells, including the impact of multiple reliability degradation mechanisms, is presented. The underlying degradation models take into account key reliability-impacting parameters such as input slew rate, output load, signal toggle rate, signal activity factor, output buffer size and age. A framework for using this age-aware library to analyze the aging of digital Integrated Circuit (IC) timing performance using existing Electronic Design Automation (EDA) methodologies is also discussed.