{"title":"更有效的Krylov子空间构造更小的基于em的等效电路模型","authors":"Pieter Heres, Jan Niehof, W. Schilders","doi":"10.1109/SPI.2005.1500913","DOIUrl":null,"url":null,"abstract":"Although Krylov subspace methods have proved to be useful techniques to reduce the size of linear interconnect models, they suffer from the drawback of redundancy. The size of the models generated by the methods is larger than strictly needed. In this paper we propose a method to reduce this redundancy. The modification requires only minor extra computational effort and makes Krylov subspace methods significantly more efficient. Two examples are given as a demonstration and validation of the proposed method. We show that with the new method models can be generated which are approximately 25% smaller in size and 50% faster in simulation time.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"More effective Krylov subspace construction for smaller EM-based equivalent circuit models\",\"authors\":\"Pieter Heres, Jan Niehof, W. Schilders\",\"doi\":\"10.1109/SPI.2005.1500913\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Although Krylov subspace methods have proved to be useful techniques to reduce the size of linear interconnect models, they suffer from the drawback of redundancy. The size of the models generated by the methods is larger than strictly needed. In this paper we propose a method to reduce this redundancy. The modification requires only minor extra computational effort and makes Krylov subspace methods significantly more efficient. Two examples are given as a demonstration and validation of the proposed method. We show that with the new method models can be generated which are approximately 25% smaller in size and 50% faster in simulation time.\",\"PeriodicalId\":182291,\"journal\":{\"name\":\"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPI.2005.1500913\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI.2005.1500913","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
More effective Krylov subspace construction for smaller EM-based equivalent circuit models
Although Krylov subspace methods have proved to be useful techniques to reduce the size of linear interconnect models, they suffer from the drawback of redundancy. The size of the models generated by the methods is larger than strictly needed. In this paper we propose a method to reduce this redundancy. The modification requires only minor extra computational effort and makes Krylov subspace methods significantly more efficient. Two examples are given as a demonstration and validation of the proposed method. We show that with the new method models can be generated which are approximately 25% smaller in size and 50% faster in simulation time.