F. Garzia, C. Brunelli, Carmelo Giliberto, Roberto Airoldi, J. Nurmi
{"title":"可重构片上系统W-CDMA槽同步的实现","authors":"F. Garzia, C. Brunelli, Carmelo Giliberto, Roberto Airoldi, J. Nurmi","doi":"10.1109/ISSOC.2008.4694868","DOIUrl":null,"url":null,"abstract":"This paper describes the implementation of the slot synchronization of a W-CDMA receiver on a reconfigurable system. The system includes a general-purpose processor core with floating-point capabilities and a reconfigurable array. We mapped a 256-element correlation on the array and we evaluated its performance. The slot synchronization uses a large number of this correlations. The stand-alone correlation produces a speed-up of 70X when mapped on the reconfigurable core in comparison with the software implementation on a general-purpose RISC core. The slot synchronization based on this implementation gives a speed-up of 33X against an area overhead of 4X.","PeriodicalId":168022,"journal":{"name":"2008 International Symposium on System-on-Chip","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Implementation of W-CDMA slot synchronization on a reconfigurable System-on-Chip\",\"authors\":\"F. Garzia, C. Brunelli, Carmelo Giliberto, Roberto Airoldi, J. Nurmi\",\"doi\":\"10.1109/ISSOC.2008.4694868\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the implementation of the slot synchronization of a W-CDMA receiver on a reconfigurable system. The system includes a general-purpose processor core with floating-point capabilities and a reconfigurable array. We mapped a 256-element correlation on the array and we evaluated its performance. The slot synchronization uses a large number of this correlations. The stand-alone correlation produces a speed-up of 70X when mapped on the reconfigurable core in comparison with the software implementation on a general-purpose RISC core. The slot synchronization based on this implementation gives a speed-up of 33X against an area overhead of 4X.\",\"PeriodicalId\":168022,\"journal\":{\"name\":\"2008 International Symposium on System-on-Chip\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 International Symposium on System-on-Chip\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSOC.2008.4694868\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Symposium on System-on-Chip","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSOC.2008.4694868","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of W-CDMA slot synchronization on a reconfigurable System-on-Chip
This paper describes the implementation of the slot synchronization of a W-CDMA receiver on a reconfigurable system. The system includes a general-purpose processor core with floating-point capabilities and a reconfigurable array. We mapped a 256-element correlation on the array and we evaluated its performance. The slot synchronization uses a large number of this correlations. The stand-alone correlation produces a speed-up of 70X when mapped on the reconfigurable core in comparison with the software implementation on a general-purpose RISC core. The slot synchronization based on this implementation gives a speed-up of 33X against an area overhead of 4X.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
