Improved charge control and frequency performance in InAs/AlSb HFETs

Micron-sized InAs/AISb-based heterostructure field-effect transistors (HFETs) generally suffer from a large increase in drain (output) conductance gm that is thought to be related to impact ionization across the small energy gap of the lnAs channel for large drain-to-source biases VDS. The large gDs was found to limit both the frequency performance, and the useful operational range of sub-micron devices to drain biases VDs < 0.4-0.5 V.l In the present paper, we show how the well thickness and the buffer layers influence the charge control properties of InAs/AISb HFETs, and how the kink can be eliminated from the drain characteristics of micron-sized HFETs, resulting in low output conductances and well-behaved drain characteristics. We also demonstrate that a proper buffer layer structure is most beneficial in sub-micron devices, and results in great improvements in operational range and frequency performance. First, we show that an increase in quantization energy, achieved by reducing the InAS well thickness, is not sufficient to eliminate the kink from the device characteristics: InAdAISb HFETs exhibit a kink for well thicknesses ranging from 15 to 7.5 nm. Though narrower wells can be grown, the dominance of interface roughness scattering in narrower wells2 makes them less attractive for high-speed HFET applications. Next, we demonstrate that the kink effect is intimately related to the composition and growth conditions used for the AI,Ga,-Sb buffer layers grown immediately below the device active region to provide a chemically stable mesa floor: with proper alloy compositions and growth conditions, InAdAISb HFETs are essentially kink free, and exhibit output conductances as low as 25 mS/mm (see Fig. 1). We also demonstrate how the addition of donors to the buffer layers can be used to further drastically alter the charge control in the InAs/AISb HFET and yield still lower output conductances. Our observations appear to link the kink effect to the holes generated during impact ionization near the drain end of the gate. Finally, we show that the improvement in buffer layers benefits sub-micron devices as well: cut-off frequencies fT as high as 70 GHz (extrapolated from 40 GHz at -6 dB/oct) were obtained in 0.5 pm devices that can be operated at drain voltages as high as VDs = 1.3 V. The improved charge control results in a nearly doubled f, (for a 17% reduction in gate length) when compared to our previous results.’ This work was supported by the ONR.