一种具有成本效益的高速自检方案

Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation Pub Date : 1993-10-19 DOI:10.1109/TENCON.1993.319934

Xiaowei Li, Fuqing Yang

{"title":"一种具有成本效益的高速自检方案","authors":"Xiaowei Li, Fuqing Yang","doi":"10.1109/TENCON.1993.319934","DOIUrl":null,"url":null,"abstract":"A serial feedback-based scheme for at-speed self-test is proposed in this paper. By using on-chip feedback lines to link pseudo random pattern generator (PRPG) and multiple input signature analysis register (MISR), aliasing can be reduced, compared to a conventional output register MISR. The analysis of state transition graph (STG) topology revealed that it is possible to design a serial feedback-based built-in self test (BIST) structure yielding STGs of disjunct rings only. Experimental results on ISCAS'85 benchmark circuits are presented.<<ETX>>","PeriodicalId":110496,"journal":{"name":"Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A cost-effective scheme for at-speed self-test\",\"authors\":\"Xiaowei Li, Fuqing Yang\",\"doi\":\"10.1109/TENCON.1993.319934\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A serial feedback-based scheme for at-speed self-test is proposed in this paper. By using on-chip feedback lines to link pseudo random pattern generator (PRPG) and multiple input signature analysis register (MISR), aliasing can be reduced, compared to a conventional output register MISR. The analysis of state transition graph (STG) topology revealed that it is possible to design a serial feedback-based built-in self test (BIST) structure yielding STGs of disjunct rings only. Experimental results on ISCAS'85 benchmark circuits are presented.<<ETX>>\",\"PeriodicalId\":110496,\"journal\":{\"name\":\"Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TENCON.1993.319934\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.1993.319934","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

提出了一种基于串行反馈的高速自检方案。通过使用片上反馈线连接伪随机模式发生器(PRPG)和多输入签名分析寄存器(MISR)，与传统的输出寄存器MISR相比，可以减少混叠。对状态转移图(STG)拓扑结构的分析表明，可以设计一种基于串行反馈的内建自检(BIST)结构，仅产生断环的STG。给出了ISCAS’85基准电路的实验结果。

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A cost-effective scheme for at-speed self-test

A serial feedback-based scheme for at-speed self-test is proposed in this paper. By using on-chip feedback lines to link pseudo random pattern generator (PRPG) and multiple input signature analysis register (MISR), aliasing can be reduced, compared to a conventional output register MISR. The analysis of state transition graph (STG) topology revealed that it is possible to design a serial feedback-based built-in self test (BIST) structure yielding STGs of disjunct rings only. Experimental results on ISCAS'85 benchmark circuits are presented.<>

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Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation

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