{"title":"一种用于WLAN接收机的4.1mW 79dB-DR四阶源跟随器连续时间滤波器","authors":"S. D’Amico, M. Conta, A. Baschirotto","doi":"10.1109/ISSCC.2006.1696187","DOIUrl":null,"url":null,"abstract":"Using a composite source-follower with positive feedback to synthesize complex poles, a single-branch CMOS biquad achieves large linearity at low overdrive voltage, saving power. In 0.18mum CMOS with a 1.8V supply, a 41h-order 10MHz filter for WLAN applications achieves 17.5dBm IIP3 and mu40dB HD3 for a 600mVpp_diff input signal amplitude. A 24muVrms noise gives a 79dB DR while drawing 2.25mA from 1.8V","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"A 4.1mW 79dB-DR 4th-order Source-FollowerBased Continuous-Time Filter for WLAN Receivers\",\"authors\":\"S. D’Amico, M. Conta, A. Baschirotto\",\"doi\":\"10.1109/ISSCC.2006.1696187\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Using a composite source-follower with positive feedback to synthesize complex poles, a single-branch CMOS biquad achieves large linearity at low overdrive voltage, saving power. In 0.18mum CMOS with a 1.8V supply, a 41h-order 10MHz filter for WLAN applications achieves 17.5dBm IIP3 and mu40dB HD3 for a 600mVpp_diff input signal amplitude. A 24muVrms noise gives a 79dB DR while drawing 2.25mA from 1.8V\",\"PeriodicalId\":166617,\"journal\":{\"name\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2006.1696187\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2006.1696187","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
摘要
采用正反馈复合源-从动器合成复杂极点,实现了低过载电压下的大线性度,节省了功耗。在1.8V电源的0.18 ma CMOS中,用于WLAN应用的41h阶10MHz滤波器在600mVpp_diff输入信号幅度下实现17.5dBm IIP3和mu40dB HD3。当从1.8V输出2.25mA时,24muVrms噪声产生79dB DR
A 4.1mW 79dB-DR 4th-order Source-FollowerBased Continuous-Time Filter for WLAN Receivers
Using a composite source-follower with positive feedback to synthesize complex poles, a single-branch CMOS biquad achieves large linearity at low overdrive voltage, saving power. In 0.18mum CMOS with a 1.8V supply, a 41h-order 10MHz filter for WLAN applications achieves 17.5dBm IIP3 and mu40dB HD3 for a 600mVpp_diff input signal amplitude. A 24muVrms noise gives a 79dB DR while drawing 2.25mA from 1.8V