用于令牌环局域网的16mb /s数据检测器和定时恢复电路

IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers Pub Date : 1989-02-15 DOI:10.1109/ISSCC.1989.48237

J. Scott, R. Starke, R. Ramachandran, D. Pietruszynki, S. Bell, K. McClellan, K. Thompson

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引用次数: 11

摘要

提出了一种适用于差分曼码16mb /s令牌环局域网的1.75 μ m CMOS接口电路。该芯片提供固定增益和切片功能，以及集成时钟恢复，数据定时和锁检测。当它与数字控制器/驱动芯片串联使用时，实现了一个完整的16 mb IEEE 802.5-1988标准兼容令牌环收发器。讨论了接口电路的块级功能，随后给出了更详细的子电路描述和测量结果的介绍。锁相环对高跃迁密度数据流的测量抖动传递函数如图所示

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A 16 Mb/s data detector and timing recovery circuit for token ring LAN

A 1.75- mu m CMOS interface circuit for a differential Manchester-coded 16-Mb/s token-ring local area network (LAN) is presented. The chip provides fixed gain and slicing functions as well as integrated clock recovery, data timing, and lock detection. When it is used in tandem with a digital controller/driver chip, a complete 16-Mb IEEE 802.5-1988 standard-compatible token-ring transceiver is realized. Block-level functionality of the interface circuit is discussed, following by more detailed subcircuit descriptions and a presentation of measured results. The measured jitter transfer function of the PLL phase-locked to a high-transition-density data stream is shown.<>

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IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers

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