P. Moens, M. Tack, H. Van Hove, M. Vermandel, D. Bolognesi
{"title":"利用实验方法的TCAD设计开发了一个优化的40 V pDMOS器件","authors":"P. Moens, M. Tack, H. Van Hove, M. Vermandel, D. Bolognesi","doi":"10.1109/SISPAD.2000.871262","DOIUrl":null,"url":null,"abstract":"A new medium voltage (40-60 V) pDMOS device has been developed and optimized through the use of a design of experiment (DOE) approach based on TCAD simulations and experimental verification. Layout parameters are varied and the electrical characteristics of the device (e.g. V/sub bd/, specific on-resistance, etc.) together with hot carrier behaviour, are studied as responses. In this way, an optimal device was selected.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"130 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Development of an optimised 40 V pDMOS device by use of a TCAD design of experiment methodology\",\"authors\":\"P. Moens, M. Tack, H. Van Hove, M. Vermandel, D. Bolognesi\",\"doi\":\"10.1109/SISPAD.2000.871262\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new medium voltage (40-60 V) pDMOS device has been developed and optimized through the use of a design of experiment (DOE) approach based on TCAD simulations and experimental verification. Layout parameters are varied and the electrical characteristics of the device (e.g. V/sub bd/, specific on-resistance, etc.) together with hot carrier behaviour, are studied as responses. In this way, an optimal device was selected.\",\"PeriodicalId\":132609,\"journal\":{\"name\":\"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)\",\"volume\":\"130 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-09-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.2000.871262\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2000.871262","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Development of an optimised 40 V pDMOS device by use of a TCAD design of experiment methodology
A new medium voltage (40-60 V) pDMOS device has been developed and optimized through the use of a design of experiment (DOE) approach based on TCAD simulations and experimental verification. Layout parameters are varied and the electrical characteristics of the device (e.g. V/sub bd/, specific on-resistance, etc.) together with hot carrier behaviour, are studied as responses. In this way, an optimal device was selected.