{"title":"具有记忆突触的神经形态处理器的建筑设计探索","authors":"Qian Wang, Yongtae Kim, Peng Li","doi":"10.1109/NANO.2014.6967962","DOIUrl":null,"url":null,"abstract":"Due to their nonvolatile nature, excellent scalability and high density, memristive nanodevices provide a promising solution for low-cost on-chip storage. Integrating memristor-based synaptic crossbars into digital neuromorphic processors (DNPs) may facilitate efficient realization of brain inspired computing. This paper investigates architectural design exploration of DNPs with memristive synapses by proposing two synapse readout schemes. The key design tradeoffs involving different analog-to-digital conversions and memory accessing styles are thoroughly investigated.","PeriodicalId":367660,"journal":{"name":"14th IEEE International Conference on Nanotechnology","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Architectural design exploration for neuromorphic processors with memristive synapses\",\"authors\":\"Qian Wang, Yongtae Kim, Peng Li\",\"doi\":\"10.1109/NANO.2014.6967962\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Due to their nonvolatile nature, excellent scalability and high density, memristive nanodevices provide a promising solution for low-cost on-chip storage. Integrating memristor-based synaptic crossbars into digital neuromorphic processors (DNPs) may facilitate efficient realization of brain inspired computing. This paper investigates architectural design exploration of DNPs with memristive synapses by proposing two synapse readout schemes. The key design tradeoffs involving different analog-to-digital conversions and memory accessing styles are thoroughly investigated.\",\"PeriodicalId\":367660,\"journal\":{\"name\":\"14th IEEE International Conference on Nanotechnology\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"14th IEEE International Conference on Nanotechnology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NANO.2014.6967962\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th IEEE International Conference on Nanotechnology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2014.6967962","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Architectural design exploration for neuromorphic processors with memristive synapses
Due to their nonvolatile nature, excellent scalability and high density, memristive nanodevices provide a promising solution for low-cost on-chip storage. Integrating memristor-based synaptic crossbars into digital neuromorphic processors (DNPs) may facilitate efficient realization of brain inspired computing. This paper investigates architectural design exploration of DNPs with memristive synapses by proposing two synapse readout schemes. The key design tradeoffs involving different analog-to-digital conversions and memory accessing styles are thoroughly investigated.