提出了一种适用于所有MOSFET工作区域的紧凑模型鉴定的拟合精度度量

H. Sakamoto, T. Iizuka
{"title":"提出了一种适用于所有MOSFET工作区域的紧凑模型鉴定的拟合精度度量","authors":"H. Sakamoto, T. Iizuka","doi":"10.1109/SISPAD.2010.5604513","DOIUrl":null,"url":null,"abstract":"Proposed is a fitting accuracy metric suitable for compact model qualification in all MOSFET operation regions. Fitting accuracy is quantified with a logarithmic deviation of simulated characteristics (such as current) from their measurement counterparts, normalized with the logarithmic deviation amplitude estimated with processs-kewed parameters (corner model). The use of this new metric successfully captures, in all MOSFET operation regions, a “hot spot” where fitting accuracy is compromised. With this knowledge, circuit designers would be able to take a necessary precaution by adding a right amount of margin on top of existing ones.","PeriodicalId":331098,"journal":{"name":"2010 International Conference on Simulation of Semiconductor Processes and Devices","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Proposal of a fitting accuracy metric suitable for compact model qualification in all MOSFET operation regions\",\"authors\":\"H. Sakamoto, T. Iizuka\",\"doi\":\"10.1109/SISPAD.2010.5604513\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Proposed is a fitting accuracy metric suitable for compact model qualification in all MOSFET operation regions. Fitting accuracy is quantified with a logarithmic deviation of simulated characteristics (such as current) from their measurement counterparts, normalized with the logarithmic deviation amplitude estimated with processs-kewed parameters (corner model). The use of this new metric successfully captures, in all MOSFET operation regions, a “hot spot” where fitting accuracy is compromised. With this knowledge, circuit designers would be able to take a necessary precaution by adding a right amount of margin on top of existing ones.\",\"PeriodicalId\":331098,\"journal\":{\"name\":\"2010 International Conference on Simulation of Semiconductor Processes and Devices\",\"volume\":\"72 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Simulation of Semiconductor Processes and Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.2010.5604513\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Simulation of Semiconductor Processes and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2010.5604513","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

提出了一种适用于所有MOSFET工作区域的紧凑模型鉴定的拟合精度度量。拟合精度通过模拟特征(如电流)与测量特征的对数偏差来量化,并通过过程参数(角模型)估计的对数偏差幅度进行归一化。在所有MOSFET操作区域中,使用这种新度量成功捕获了拟合精度受到损害的“热点”。有了这些知识,电路设计人员就可以采取必要的预防措施,在现有的边缘上增加适量的边缘。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Proposal of a fitting accuracy metric suitable for compact model qualification in all MOSFET operation regions
Proposed is a fitting accuracy metric suitable for compact model qualification in all MOSFET operation regions. Fitting accuracy is quantified with a logarithmic deviation of simulated characteristics (such as current) from their measurement counterparts, normalized with the logarithmic deviation amplitude estimated with processs-kewed parameters (corner model). The use of this new metric successfully captures, in all MOSFET operation regions, a “hot spot” where fitting accuracy is compromised. With this knowledge, circuit designers would be able to take a necessary precaution by adding a right amount of margin on top of existing ones.
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