{"title":"分数阶健康和癌变肺细胞电阻抗谱模型的模拟实现","authors":"Vassilis Alimisis, Christos Dimas, P. Sotiriadis","doi":"10.1109/ICM50269.2020.9331793","DOIUrl":null,"url":null,"abstract":"This work proposes an integrated-circuit architecture emulating healthy and cancerous lung cell behaviors, approximated by Cole models and is suitable for calibration and phantom experimental testing of electrical bioimpedance circuits and systems. The architecture is based on fractional-order elements implemented with both active and passive components, offering an accurate transfer function behavior between 10kHz and 1MHz. The high-level architecture includes an analog all-pass filter coupled with a current conveyor. Performance and accuracy of the proposed architecture is confirmed via Monte-Carlo simulation. The proposed circuitry has been designed in TSMC 90nm CMOS process and simulated using the Cadence IC suite.","PeriodicalId":243968,"journal":{"name":"2020 32nd International Conference on Microelectronics (ICM)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analogue Realization of Fractional-Order Healthy and Cancerous Lung Cell Models for Electrical Impedance Spectroscopy\",\"authors\":\"Vassilis Alimisis, Christos Dimas, P. Sotiriadis\",\"doi\":\"10.1109/ICM50269.2020.9331793\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work proposes an integrated-circuit architecture emulating healthy and cancerous lung cell behaviors, approximated by Cole models and is suitable for calibration and phantom experimental testing of electrical bioimpedance circuits and systems. The architecture is based on fractional-order elements implemented with both active and passive components, offering an accurate transfer function behavior between 10kHz and 1MHz. The high-level architecture includes an analog all-pass filter coupled with a current conveyor. Performance and accuracy of the proposed architecture is confirmed via Monte-Carlo simulation. The proposed circuitry has been designed in TSMC 90nm CMOS process and simulated using the Cadence IC suite.\",\"PeriodicalId\":243968,\"journal\":{\"name\":\"2020 32nd International Conference on Microelectronics (ICM)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 32nd International Conference on Microelectronics (ICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM50269.2020.9331793\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 32nd International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM50269.2020.9331793","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analogue Realization of Fractional-Order Healthy and Cancerous Lung Cell Models for Electrical Impedance Spectroscopy
This work proposes an integrated-circuit architecture emulating healthy and cancerous lung cell behaviors, approximated by Cole models and is suitable for calibration and phantom experimental testing of electrical bioimpedance circuits and systems. The architecture is based on fractional-order elements implemented with both active and passive components, offering an accurate transfer function behavior between 10kHz and 1MHz. The high-level architecture includes an analog all-pass filter coupled with a current conveyor. Performance and accuracy of the proposed architecture is confirmed via Monte-Carlo simulation. The proposed circuitry has been designed in TSMC 90nm CMOS process and simulated using the Cadence IC suite.