一个0.6 v电源带隙参考65nm CMOS

Omar Abdelfattah, I. Shih, G. Roberts, Y. Shih
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引用次数: 2

摘要

本文提出了一种工作在0.6 V电源上的带隙基准电压。该电路基于全cmos实现,通过消除寄生垂直双极结晶体管,允许在基极-发射极电压限制下工作。采用低电压设计技术设计运放,可以避免启动电路的需要。该设计采用65纳米CMOS技术实现。测量的参考电压为275 mV,平均温度系数为176 ppm/°C,从-50°C到80°C,没有修剪。电路功耗为62 μW,芯片面积为0.011 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 0.6V-supply bandgap reference in 65 nm CMOS
A bandgap voltage reference that operates from a power supply of 0.6 V is presented in this paper. The circuit is based on an all-CMOS implementation that allows operation below the base-emitter voltage limit by eliminating parasitic vertical bipolar-junction-transistors. Low-voltage design techniques are deployed to design an op-amp that can obviate the need for a start-up circuit. The design was implemented in 65 nm CMOS technology. The measured reference voltage is 275 mV with an average temperature coefficient of 176 ppm/°C from -50°C to 80°C without trimming. The circuit consumes 62 μW of power and occupies 0.011 mm2 of chip area.
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