M. Pavanello, T. A. Ribeiro, A. Cerdeira, F. Avila-Herrera
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Analytical Compact Model for Transcapacitances of Junctionless Nanowire Transistors
This paper presents the proposal of a compact analytical model for the transcapacitances of long-channel triple gate junctionless nanowire transistors. The model is validated using comparisons against 3D TCAD simulations showing very good agreement, with continuous transitions between all regions of operation.