V. V. Peruzzi, C. Renaux, D. Flandre, Salvador Pinillos Gimenez
{"title":"采用菱形布局方式提高mosfet的匹配","authors":"V. V. Peruzzi, C. Renaux, D. Flandre, Salvador Pinillos Gimenez","doi":"10.1109/SBMICRO.2016.7731334","DOIUrl":null,"url":null,"abstract":"This paper performs an experimental comparative study of the Metal-Oxide-Semiconductor Silicon-On-Insulator (SOI) Field Effect Transistors (MOSFETs) matching, which are implemented with the hexagonal gate geometry (Diamond) and classical rectangular one. Some of the main analog parameters of 360 devices are investigated. The results demonstrate that the Diamond SOI MOSFETs with α angles equal to 53.1° and 90° are capable of boosting in more than 20% the devices matching in comparison to those observed in the typical rectangular SOI MOSFETs, regarding the same gate area and bias conditions. Therefore, the Diamond layout style is an alternative technique to reduce the MOSFETs' mismatching regarding the analog SOI CMOS ICs applications.","PeriodicalId":113603,"journal":{"name":"2016 31st Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Boosting the MOSFETs matching by using diamond layout style\",\"authors\":\"V. V. Peruzzi, C. Renaux, D. Flandre, Salvador Pinillos Gimenez\",\"doi\":\"10.1109/SBMICRO.2016.7731334\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper performs an experimental comparative study of the Metal-Oxide-Semiconductor Silicon-On-Insulator (SOI) Field Effect Transistors (MOSFETs) matching, which are implemented with the hexagonal gate geometry (Diamond) and classical rectangular one. Some of the main analog parameters of 360 devices are investigated. The results demonstrate that the Diamond SOI MOSFETs with α angles equal to 53.1° and 90° are capable of boosting in more than 20% the devices matching in comparison to those observed in the typical rectangular SOI MOSFETs, regarding the same gate area and bias conditions. Therefore, the Diamond layout style is an alternative technique to reduce the MOSFETs' mismatching regarding the analog SOI CMOS ICs applications.\",\"PeriodicalId\":113603,\"journal\":{\"name\":\"2016 31st Symposium on Microelectronics Technology and Devices (SBMicro)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 31st Symposium on Microelectronics Technology and Devices (SBMicro)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SBMICRO.2016.7731334\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 31st Symposium on Microelectronics Technology and Devices (SBMicro)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBMICRO.2016.7731334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Boosting the MOSFETs matching by using diamond layout style
This paper performs an experimental comparative study of the Metal-Oxide-Semiconductor Silicon-On-Insulator (SOI) Field Effect Transistors (MOSFETs) matching, which are implemented with the hexagonal gate geometry (Diamond) and classical rectangular one. Some of the main analog parameters of 360 devices are investigated. The results demonstrate that the Diamond SOI MOSFETs with α angles equal to 53.1° and 90° are capable of boosting in more than 20% the devices matching in comparison to those observed in the typical rectangular SOI MOSFETs, regarding the same gate area and bias conditions. Therefore, the Diamond layout style is an alternative technique to reduce the MOSFETs' mismatching regarding the analog SOI CMOS ICs applications.