用于短距离应用的低能量CMOS共漏功率放大器

P. Saffari, M. Taherzadeh‐Sani, A. Basaligheh, F. Nabki, M. Sawan
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引用次数: 5

摘要

本文介绍了一种采用共漏结构实现的功率放大器。通过适当的输入匹配,与其他低功耗拓扑结构相比,该结构显示出合理的功率增益和优越的线性度和效率。这是由于功率增益对晶体管跨导的低依赖性和栅极-源电容的低电压变化。该功率放大器适用于低功耗和短距离应用,如蓝牙低功耗(BLE)。根据计算的s参数,给出了该放大器的工作频率及其设计权衡,并与竞争拓扑进行了比较。该设计采用0.13 μm CMOS技术进行仿真,工作电源为1.2 V,功率增益为8.5 dB,直流功耗为3.6 mW。输入1-dB压缩点为2.2 dBm,功率增加效率为43%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low-energy CMOS common-drain power amplifier for short-range applications
In this paper, a power amplifier implemented with a common-drain structure is introduced. With proper input matching, this structure is shown to provide a reasonable power gain and superior linearity and efficiency in comparison to other low-power topologies. This is shown to be due to the low dependency of the power gain to the transistor transconductance and the low-voltage variations across the gate-source capacitance. This power amplifier is suitable for low-power and short-range applications such as Bluetooth Low Energy (BLE). Based on the calculated S-parameters, the operation frequency of this amplifier and its design trade-offs are presented, along with a comparison with competitive topologies. The design is simulated in a 0.13 μm CMOS technology, operates with a 1.2 V supply, and provides a power gain of 8.5 dB with a DC power consumption of 3.6 mW. The input 1-dB compression point is 2.2 dBm, yielding a power added efficiency of 43%.
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