硅超结mosfet的结构和世代损耗

G. Zulauf, J. Rivas-Davila
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引用次数: 9

摘要

超结(SJ)结构打破了硅功率mosfet单极材料的限制,在商用功率变换器中得到了广泛的应用。在谐振应用中,这些SJ器件由于充电和放电寄生输出电容损耗,导致损耗随着开关频率的增加而增加。我们记录了商用600 V超结器件的损耗,表明即使用沟槽填充外延方法生长的器件在MHz转换器中也有不可忽略的损耗。此外,随着电池间距的降低和掺杂的增加,制造商内部的代际进展似乎对应于更高的损耗。在这里测试的器件的许多应用中,损耗可能超过传导损耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Coss losses in silicon superjunction MOSFETs across constructions and generations
The superjunction (SJ) structure breaks the unipolar material limit of silicon power MOSFETs, and has achieved widespread adoption in commercial power converters. In resonant applications, these SJ devices experience losses due to charging and discharging the parasitic output capacitor, Coss, resulting in losses that increase with switching frequency. We document COSS losses in commercially-available 600 V superjunction devices, showing that even devices grown with the trench-filling epitaxial method have non-negligible losses in MHz converters. Further, progressing in generations within a manufacturer appears to correspond to higher COSS losses as the cell pitch is reduced and doping is increased. The COSS losses may exceed conduction losses in many applications for the devices tested here.
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