{"title":"一种动态范围性能优异的CMOS直接下变频器","authors":"M. Brandolini, P. Rossi, D. Sanzogni, F. Svelto","doi":"10.1109/NEWCAS.2005.1496718","DOIUrl":null,"url":null,"abstract":"The mechanisms responsible for second order inter-modulation distortion in a direct down-converter are addressed, giving rise to the following design strategy: the transconductor is degenerated by means of an RC filter with pole equal to the signal bandwidth, an LC filter resonating at RF frequency loads the switching pair and carefully matched load resistors develop voltage gain. Prototypes realized in 0.18/spl mu/m CMOS show: +78dBm IIP2 minimum among 40 samples, +10dBm IIP3, 4nV/VHz input-referred noise density while burning only 4mA from 1.8V.","PeriodicalId":131387,"journal":{"name":"The 3rd International IEEE-NEWCAS Conference, 2005.","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A CMOS direct down-converter with outstanding dynamic range performances\",\"authors\":\"M. Brandolini, P. Rossi, D. Sanzogni, F. Svelto\",\"doi\":\"10.1109/NEWCAS.2005.1496718\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The mechanisms responsible for second order inter-modulation distortion in a direct down-converter are addressed, giving rise to the following design strategy: the transconductor is degenerated by means of an RC filter with pole equal to the signal bandwidth, an LC filter resonating at RF frequency loads the switching pair and carefully matched load resistors develop voltage gain. Prototypes realized in 0.18/spl mu/m CMOS show: +78dBm IIP2 minimum among 40 samples, +10dBm IIP3, 4nV/VHz input-referred noise density while burning only 4mA from 1.8V.\",\"PeriodicalId\":131387,\"journal\":{\"name\":\"The 3rd International IEEE-NEWCAS Conference, 2005.\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 3rd International IEEE-NEWCAS Conference, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NEWCAS.2005.1496718\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd International IEEE-NEWCAS Conference, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2005.1496718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CMOS direct down-converter with outstanding dynamic range performances
The mechanisms responsible for second order inter-modulation distortion in a direct down-converter are addressed, giving rise to the following design strategy: the transconductor is degenerated by means of an RC filter with pole equal to the signal bandwidth, an LC filter resonating at RF frequency loads the switching pair and carefully matched load resistors develop voltage gain. Prototypes realized in 0.18/spl mu/m CMOS show: +78dBm IIP2 minimum among 40 samples, +10dBm IIP3, 4nV/VHz input-referred noise density while burning only 4mA from 1.8V.
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