有VHDL和硅编译器高级处理器接口单元ASIC设计经验

Proceedings of Eighth International Application Specific Integrated Circuits Conference Pub Date : 1995-09-18 DOI:10.1109/ASIC.1995.580742

K. Chang, H. Le, C. Ling, D. Lin

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引用次数: 0

摘要

本文概述了采用VHDL仿真、综合和硅编译等方法设计高级处理器接口单元(APIU) ASIC的过程。讨论了不同CAD工具环境之间的接口存在的问题和需要改进的地方。通过实例讨论了VHDL实体和层次划分准则。

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VHDL and silicon compiler experience in the advanced processor interface unit ASIC design

This paper summarizes the process of designing an advanced processor interface unit (APIU) ASIC using VHDL simulation, synthesis, and silicon compilation. Problems and areas for improvements in the interface between different CAD tool environments are addressed. VHDL entity and hierarchy partition guidelines are discussed with examples.

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Proceedings of Eighth International Application Specific Integrated Circuits Conference

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