35nm栅极In0.7Ga0.3As/In0.52Al0.48As HEMT

I. Watanabe, A. Endoh, T. Mimura, T. Matsui
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引用次数: 4

摘要

我们采用一种简单的自校准一步嵌入式栅极工艺制备了35纳米栅极In0.7Ga0.3As/In0.52Al0.48As高电子迁移率晶体管。在室温下,器件的外部最大跨导(gm_max)为1.7 S/mm,电流增益截止频率(fT)为520 GHz。通过将栅极长度减小到35 nm,并使用3 nm厚的InAlAs间隔层、6 nm厚的InAlAs肖特基势垒层和2 nm厚的InP刻蚀塞层的外延结构,将栅极到通道的距离减小到8 nm,同时形成50 nm长的侧凹槽结构和t形栅极堆叠在InAlAs肖特基势垒层上,从而获得了显著的高fT。这些结果是采用一步隐式栅极方法实现高达520 GHz的光纤传输的第一个实验成果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
35-nm-Gate In0.7Ga0.3As/In0.52Al0.48As HEMT with 520-GHz fT
We fabricated a 35-nm-gate In0.7Ga0.3As/In0.52Al0.48As high electron mobility transistor by using a simple, self-aligned one-step-recessed gate procedure. An extrinsic maximum transconductance (gm_max) of 1.7 S/mm and a current gain cutoff frequency (fT) of 520 GHz were achieved at room temperature. This significantly high fT was obtained by reducing the gate length to 35 nm and using an epitaxial structure with a 3-nm-thick InAlAs spacer layer, a 6-nm-thick InAlAs Schottky barrier layer and a 2-nm-thick InP etching stopper layer to decrease the gate-to-channel distance to 8 nm, and form simultaneously 50-nm-long side-recess structures and T-shaped gates stacked on the InAlAs Schottky barrier layer. These results are the first experimental achievement of fT as high as 520 GHz by using the one-step-recessed gate procedure.
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