一种可靠的低功耗快速偏斜补偿电路

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) Pub Date : 2004-01-27 DOI:10.1109/ASPDAC.2004.1337642

Yi-Ming Wang, Jinn-Shyan Wang

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引用次数: 0

摘要

提出了一种可靠的低功耗快速偏斜补偿电路。与传统的基于smd的电路相比，新设计在50%占空比的时钟上工作更加可靠[1]-[3]，传统的smd电路只能在脉冲时钟上工作。这种新电路也能在两个时钟周期内实现锁相。测试电路工作在600 ~ 800 MHz范围内，功耗为25 μ w /MHz ~ 26 μ w /MHz。当测量频率为616.9 mhz和791.4 mhz时，静态相位分别为76.8 ps和124.5 ps。

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A reliable low-power fast skew-compensation circuit

A reliable low-power fast skew-compensation circuit is proposed. Operating on the clock with a 50% duty cycle, the new design is more reliable compared to conventional SMD-based circuits [1]-[3], which can operate only on the pulsed clock. This new circuit also gets phase locking within two clock cycles. The test circuit works successfully between 600-MHz ~ 800-MHz with a power consumption of 25-μW/MHz ~ 26-μW/MHz. When measured at 616.9-MHz and 791.4-MHz, the static phase is 76.8-ps and 124.5-ps, respectively.

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ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)

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