Tae Seon Kim, Se-Hwan Ahn, Y. Jang, Jeong In Lee, Kil Jae Lee, B. Kim, Chang Hyun Cho
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Intelligent yield prediction models for high-speed microprocessors
Neural network based yield prediction models are developed to optimize high-speed microprocessor manufacturing processes. Based on measured sixty ET (electrical test) data, wafer level parametric yield prediction models are developed. In this work, manufacturing yield was considered as a manufacturing performance index because it is very critical to overall manufacturing cost and product quality. The prediction results show 41.09% improvement as compared to statistical prediction model using multiple regression. These modeling approaches are also applied to predict final chip speed to minimize undesirable packaging costs. The prediction results show only 1.7% of average speed differences. Ultimately, these neural prediction models are used to find optimal process conditions, and with the successful implementation of this work, it can serve as a catalyst to improve productivity and chip quality.