Preeti Sharma, K. Sharma, Jaya Madan, R. Pandey, H. S. Jatana, Rajnish Sharma
{"title":"一种用于神经信号调理的低功耗gm-C滤波器","authors":"Preeti Sharma, K. Sharma, Jaya Madan, R. Pandey, H. S. Jatana, Rajnish Sharma","doi":"10.1109/VLSIDCS47293.2020.9179856","DOIUrl":null,"url":null,"abstract":"Neural recording interfaces are being developed to record neuronal activities of the brain for several decades. There is a stringent requirement to provide conditioning to the weak neural signals. However, various analog designers come across a major challenge of lowering down the values of power consumption by the neural signal conditioning stage owing to the noise and bandwidth trade-offs to power. As an anticipated solution to the same, the design of low-noise operational-transconductance amplifier (OTA) - Capacitor filter or gm-C filter capable of passing EEG signals has been presented in this paper. The reported gm-C filter which relies on Gate-Capacitive Bulk-Driven and current-division technique has been implemented in Cadence Analog Design Platform using standard 0.18 μm CMOS process with BSIM3V3 models of transistors. The simulation results indicate that the proposed circuit draws a very low power (0.368 μW) from the power supply of ± 0.5 V with the total-integrated input referred noise voltage of 4.6 μVRMS and -3 dB frequency of 56.2 Hz. The suggested architecture design of the demonstrated conditioning stage may be useful in the field of low-power neuroprosthetic applications.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Low-Power gm-C Filter for Neural Signal Conditioning\",\"authors\":\"Preeti Sharma, K. Sharma, Jaya Madan, R. Pandey, H. S. Jatana, Rajnish Sharma\",\"doi\":\"10.1109/VLSIDCS47293.2020.9179856\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Neural recording interfaces are being developed to record neuronal activities of the brain for several decades. There is a stringent requirement to provide conditioning to the weak neural signals. However, various analog designers come across a major challenge of lowering down the values of power consumption by the neural signal conditioning stage owing to the noise and bandwidth trade-offs to power. As an anticipated solution to the same, the design of low-noise operational-transconductance amplifier (OTA) - Capacitor filter or gm-C filter capable of passing EEG signals has been presented in this paper. The reported gm-C filter which relies on Gate-Capacitive Bulk-Driven and current-division technique has been implemented in Cadence Analog Design Platform using standard 0.18 μm CMOS process with BSIM3V3 models of transistors. The simulation results indicate that the proposed circuit draws a very low power (0.368 μW) from the power supply of ± 0.5 V with the total-integrated input referred noise voltage of 4.6 μVRMS and -3 dB frequency of 56.2 Hz. The suggested architecture design of the demonstrated conditioning stage may be useful in the field of low-power neuroprosthetic applications.\",\"PeriodicalId\":446218,\"journal\":{\"name\":\"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIDCS47293.2020.9179856\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS47293.2020.9179856","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Low-Power gm-C Filter for Neural Signal Conditioning
Neural recording interfaces are being developed to record neuronal activities of the brain for several decades. There is a stringent requirement to provide conditioning to the weak neural signals. However, various analog designers come across a major challenge of lowering down the values of power consumption by the neural signal conditioning stage owing to the noise and bandwidth trade-offs to power. As an anticipated solution to the same, the design of low-noise operational-transconductance amplifier (OTA) - Capacitor filter or gm-C filter capable of passing EEG signals has been presented in this paper. The reported gm-C filter which relies on Gate-Capacitive Bulk-Driven and current-division technique has been implemented in Cadence Analog Design Platform using standard 0.18 μm CMOS process with BSIM3V3 models of transistors. The simulation results indicate that the proposed circuit draws a very low power (0.368 μW) from the power supply of ± 0.5 V with the total-integrated input referred noise voltage of 4.6 μVRMS and -3 dB frequency of 56.2 Hz. The suggested architecture design of the demonstrated conditioning stage may be useful in the field of low-power neuroprosthetic applications.