IDDT测试在纳米技术中提高SRAM可靠性的应用

G. Gyepes, D. Arbet, J. Brenkus, V. Stopjaková
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引用次数: 11

摘要

研究了静态随机存取存储器(SRAM)单元阵列的动态供电电流测试方法(IDDT测试),以揭示弱开放缺陷。在64位SRAM电路上进行了仿真,监测了IDDT波形的几个参数。SRAM电路采用90纳米CMOS技术设计。评价了IDDT检测揭示开放缺陷的效率,并比较了4种不同单元格比(CR)的SRAM阵列的检测结果。此外,还提出了一种将动态电流转换为电压的解决方案。将电流波形转换为电压波形后,电压波形的参数与电流波形的参数相似,便于监测和评价。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Application of IDDT test towards increasing SRAM reliability in nanometer technologies
Dynamic supply current test method (IDDT test) in static random access memory (SRAM) cell arrays is addressed in order to unveil weak open defects. Simulations were carried out on a 64-bit SRAM circuit, where several parameters of the IDDT waveform were monitored. The SRAM circuit was designed in a 90 nm CMOS technology. Efficiency of IDDT test in unveiling open defects was evaluated and the achieved results were compared for four SRAM arrays with cells of different cell ratio (CR). Moreover, a solution for transformation of the dynamic current to voltage is presented. After the transformation of the current waveform to a voltage waveform, the parameters of the voltage waveform similar to those of the current waveform are easily monitored and evaluated.
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