{"title":"一种针对存储器中多比特扰动(MBU)的5位突发纠错码设计方法","authors":"Jiaqiang Li, Liyi Xiao, Liu He, Haotian Wu","doi":"10.1109/ASICON47005.2019.8983522","DOIUrl":null,"url":null,"abstract":"Space applications face severe challenges from soft errors caused by cosmic rays. Soft errors can change the storage state of memories used in electronic system, leading to system failure. To avoid the system corruption, error correction codes (ECCs) as the general mitigation strategy in system level are utilized to eliminate the soft error influence. As the feature size goes down, more memory cells are integrated in the energy deposited range of radiation particles and MBU becomes the main error patterns. In this paper, we propose a new method to design 5-bit burst error correction code against more complex burst error. To achieve that, a technique to design a code with unequal correction ability and a customized interleaving plan combined with the proposed code is presented. The experiment result implies that this method is efficient for MBUs mitigation and a potential option for system designers.","PeriodicalId":319342,"journal":{"name":"2019 IEEE 13th International Conference on ASIC (ASICON)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Method to Design 5-Bit Burst Error Correction Code against the Multiple Bit Upset (MBU) in Memories\",\"authors\":\"Jiaqiang Li, Liyi Xiao, Liu He, Haotian Wu\",\"doi\":\"10.1109/ASICON47005.2019.8983522\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Space applications face severe challenges from soft errors caused by cosmic rays. Soft errors can change the storage state of memories used in electronic system, leading to system failure. To avoid the system corruption, error correction codes (ECCs) as the general mitigation strategy in system level are utilized to eliminate the soft error influence. As the feature size goes down, more memory cells are integrated in the energy deposited range of radiation particles and MBU becomes the main error patterns. In this paper, we propose a new method to design 5-bit burst error correction code against more complex burst error. To achieve that, a technique to design a code with unequal correction ability and a customized interleaving plan combined with the proposed code is presented. The experiment result implies that this method is efficient for MBUs mitigation and a potential option for system designers.\",\"PeriodicalId\":319342,\"journal\":{\"name\":\"2019 IEEE 13th International Conference on ASIC (ASICON)\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 13th International Conference on ASIC (ASICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON47005.2019.8983522\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 13th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON47005.2019.8983522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Method to Design 5-Bit Burst Error Correction Code against the Multiple Bit Upset (MBU) in Memories
Space applications face severe challenges from soft errors caused by cosmic rays. Soft errors can change the storage state of memories used in electronic system, leading to system failure. To avoid the system corruption, error correction codes (ECCs) as the general mitigation strategy in system level are utilized to eliminate the soft error influence. As the feature size goes down, more memory cells are integrated in the energy deposited range of radiation particles and MBU becomes the main error patterns. In this paper, we propose a new method to design 5-bit burst error correction code against more complex burst error. To achieve that, a technique to design a code with unequal correction ability and a customized interleaving plan combined with the proposed code is presented. The experiment result implies that this method is efficient for MBUs mitigation and a potential option for system designers.