Yu-Shan Su, Chu Yu, Bor-Shing Lin, Po-Hsun Cheng, Sao-Jie Chen
{"title":"采用简化的分步算法设计(255,239)里德-所罗门解码器","authors":"Yu-Shan Su, Chu Yu, Bor-Shing Lin, Po-Hsun Cheng, Sao-Jie Chen","doi":"10.1109/ISCE.2013.6570209","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a new (255, 239) Reed-Solomon (RS) decoder using a simplified step-by-step algorithm. For calculating the syndrome determinant in the RS decoder, the proposed architecture performs Gauss elimination on a 1-D systolic array that has lower hardware complexity and is more suited to be used on a higher-dimension matrix with the step-by-step algorithm. The proposed architecture, designed in 0.18 μm CMOS technology, has approximately 25K gates, and consumes approximately 40 mW at 250 MHz.","PeriodicalId":442380,"journal":{"name":"2013 IEEE International Symposium on Consumer Electronics (ISCE)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design of a (255, 239) Reed-Solomon decoder using a simplified step-by-step algorithm\",\"authors\":\"Yu-Shan Su, Chu Yu, Bor-Shing Lin, Po-Hsun Cheng, Sao-Jie Chen\",\"doi\":\"10.1109/ISCE.2013.6570209\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of a new (255, 239) Reed-Solomon (RS) decoder using a simplified step-by-step algorithm. For calculating the syndrome determinant in the RS decoder, the proposed architecture performs Gauss elimination on a 1-D systolic array that has lower hardware complexity and is more suited to be used on a higher-dimension matrix with the step-by-step algorithm. The proposed architecture, designed in 0.18 μm CMOS technology, has approximately 25K gates, and consumes approximately 40 mW at 250 MHz.\",\"PeriodicalId\":442380,\"journal\":{\"name\":\"2013 IEEE International Symposium on Consumer Electronics (ISCE)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Symposium on Consumer Electronics (ISCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCE.2013.6570209\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Symposium on Consumer Electronics (ISCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCE.2013.6570209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a (255, 239) Reed-Solomon decoder using a simplified step-by-step algorithm
This paper presents the design of a new (255, 239) Reed-Solomon (RS) decoder using a simplified step-by-step algorithm. For calculating the syndrome determinant in the RS decoder, the proposed architecture performs Gauss elimination on a 1-D systolic array that has lower hardware complexity and is more suited to be used on a higher-dimension matrix with the step-by-step algorithm. The proposed architecture, designed in 0.18 μm CMOS technology, has approximately 25K gates, and consumes approximately 40 mW at 250 MHz.