采用特殊设计的微dsp的低功耗W-CDMA解调器

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012855

H. Igura, M. Hirata, J. Yamada, M. Yamashina, S. Ono

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引用次数: 2

摘要

本文介绍了一种用于W-CDMA数字基带处理的解调器的结构。该解调器具有专门为其设计的微型dsp和各种降低功耗和节省面积的技术，如详细的时钟控制，减少不必要的信号转换和数据压缩。这些特性使解调器比传统的解调器功耗更低，尺寸更小。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A low-power W-CDMA demodulator using specially-designed micro-DSPs

This paper presents the architecture of a demodulator developed for W-CDMA digital baseband processing. The demodulator features micro-DSPs specially designed for it and a variety of power-lowering and area-saving techniques such as detailed clock control, reduction of unnecessary signal transition and data compression. These features give the demodulator much lower power consumption and smaller size than a conventional one.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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