先进的0.5 /spl μ m CMOS/SOI技术,适用于实用的超高速和低功耗电路

T. Ipposhi, T. Iwamatsu, Y. Yamaguchi, K. Ueda, H. Morinaka, K. Mashiko, Y. Inoue, T. Hirao
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引用次数: 2

摘要

薄膜SOI mosfet由于减少了结电容和减少了后门偏置效应而具有高速和低功耗的特性。因此,薄SOI器件被认为是用于高速和低功耗CMOS lsi的元件晶体管结构的候选器件。为了进入商业应用阶段,有必要在各种实际电路中证明SOI器件的有效性。在本文中,我们报道了一种先进的0.5 /spl μ m CMOS/SOI技术,并演示了两种典型电路:分频器和加法器的超高速低功耗工作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An advanced 0.5 /spl mu/m CMOS/SOI technology for practical ultrahigh-speed and low-power circuits
Thin-film SOI MOSFETs offer high-speed and low-power characteristics due to reduced junction capacitance and reduced back-gate-bias effect. Therefore, thin SOI devices have been considered to be candidates for element transistor structures used in high-speed and low-power CMOS LSIs. In order to proceed to the stage of commercial application, it is necessary to demonstrate the effectiveness of SOI devices in various kinds of practical circuits. In this paper, we report an advanced 0.5 /spl mu/m CMOS/SOI technology and demonstrate ultrahigh-speed and low-power operation in two kinds of typical circuits: frequency divider and adder.
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