{"title":"一种无刷直流电机速度控制器的FPGA实现","authors":"B. Alecsa, A. Onea","doi":"10.1109/SIITME.2010.5653617","DOIUrl":null,"url":null,"abstract":"The spreading of brushless DC (BLDC) motors has imposed the need for efficient and low cost motor control drives. In this paper, a low cost digital controller is presented. For experimental testing, the controller is implemented inside a field programmable gate array (FPGA) device. The developed design is validated in a modular fashion by logic simulation and experimental results are provided. The main contribution is the presented controller design methodology for FPGA implementation.","PeriodicalId":155180,"journal":{"name":"2010 IEEE 16th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"223 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"An FPGA implementation of a brushless DC motor speed controller\",\"authors\":\"B. Alecsa, A. Onea\",\"doi\":\"10.1109/SIITME.2010.5653617\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The spreading of brushless DC (BLDC) motors has imposed the need for efficient and low cost motor control drives. In this paper, a low cost digital controller is presented. For experimental testing, the controller is implemented inside a field programmable gate array (FPGA) device. The developed design is validated in a modular fashion by logic simulation and experimental results are provided. The main contribution is the presented controller design methodology for FPGA implementation.\",\"PeriodicalId\":155180,\"journal\":{\"name\":\"2010 IEEE 16th International Symposium for Design and Technology in Electronic Packaging (SIITME)\",\"volume\":\"223 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE 16th International Symposium for Design and Technology in Electronic Packaging (SIITME)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIITME.2010.5653617\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE 16th International Symposium for Design and Technology in Electronic Packaging (SIITME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIITME.2010.5653617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An FPGA implementation of a brushless DC motor speed controller
The spreading of brushless DC (BLDC) motors has imposed the need for efficient and low cost motor control drives. In this paper, a low cost digital controller is presented. For experimental testing, the controller is implemented inside a field programmable gate array (FPGA) device. The developed design is validated in a modular fashion by logic simulation and experimental results are provided. The main contribution is the presented controller design methodology for FPGA implementation.