K. Sasaki, M. Manini, J. Martino, M. Aoulaiche, E. Simoen, L. Witters, C. Claeys
{"title":"地平面对增强动态阈值UTBB SOI nmosfet的影响","authors":"K. Sasaki, M. Manini, J. Martino, M. Aoulaiche, E. Simoen, L. Witters, C. Claeys","doi":"10.1109/ICCDCS.2014.7016149","DOIUrl":null,"url":null,"abstract":"This paper investigates the ground plane influence on Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT) operation (V<sub>B</sub>=V<sub>G</sub>) over the conventional one (V<sub>B</sub>=0V). The ground plane in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (V<sub>B</sub>=k×V<sub>G</sub>) and the inverse eDT mode (V<sub>G</sub>=k×V<sub>B</sub>) were also considered and compared to the other configurations. The presence of the Ground Plane region in all DT configurations results in superior DC parameters like on-current/off-current ratio, a steeper subthreshold slope and a higher transconductance.","PeriodicalId":200044,"journal":{"name":"2014 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Ground plane influence on enhanced dynamic threshold UTBB SOI nMOSFETs\",\"authors\":\"K. Sasaki, M. Manini, J. Martino, M. Aoulaiche, E. Simoen, L. Witters, C. Claeys\",\"doi\":\"10.1109/ICCDCS.2014.7016149\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates the ground plane influence on Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT) operation (V<sub>B</sub>=V<sub>G</sub>) over the conventional one (V<sub>B</sub>=0V). The ground plane in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (V<sub>B</sub>=k×V<sub>G</sub>) and the inverse eDT mode (V<sub>G</sub>=k×V<sub>B</sub>) were also considered and compared to the other configurations. The presence of the Ground Plane region in all DT configurations results in superior DC parameters like on-current/off-current ratio, a steeper subthreshold slope and a higher transconductance.\",\"PeriodicalId\":200044,\"journal\":{\"name\":\"2014 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-04-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCDCS.2014.7016149\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCDCS.2014.7016149","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ground plane influence on enhanced dynamic threshold UTBB SOI nMOSFETs
This paper investigates the ground plane influence on Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT) operation (VB=VG) over the conventional one (VB=0V). The ground plane in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (VB=k×VG) and the inverse eDT mode (VG=k×VB) were also considered and compared to the other configurations. The presence of the Ground Plane region in all DT configurations results in superior DC parameters like on-current/off-current ratio, a steeper subthreshold slope and a higher transconductance.