VLSI的极限

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1980.1156106

R. Pashley, L. Terman

{"title":"VLSI的极限","authors":"R. Pashley, L. Terman","doi":"10.1109/ISSCC.1980.1156106","DOIUrl":null,"url":null,"abstract":"The industry is continuing to shrink devices and increase integration levels. The panel will discuss the fundamental limits and practical barriers to the on-going development of VLSI, including reliability and yield effects of scaling, hot electron trapping, soft errors, current density limitations, leakage and circuit design tradeoffs. The focus will be on technology, device and circuit considerations.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Limits of VLSI\",\"authors\":\"R. Pashley, L. Terman\",\"doi\":\"10.1109/ISSCC.1980.1156106\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The industry is continuing to shrink devices and increase integration levels. The panel will discuss the fundamental limits and practical barriers to the on-going development of VLSI, including reliability and yield effects of scaling, hot electron trapping, soft errors, current density limitations, leakage and circuit design tradeoffs. The focus will be on technology, device and circuit considerations.\",\"PeriodicalId\":229101,\"journal\":{\"name\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1980.1156106\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1980.1156106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

该行业正在继续缩小设备并提高集成水平。该小组将讨论VLSI持续发展的基本限制和实际障碍，包括缩放的可靠性和良率影响，热电子捕获，软误差，电流密度限制，泄漏和电路设计权衡。重点将放在技术、器件和电路方面。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Limits of VLSI

The industry is continuing to shrink devices and increase integration levels. The panel will discuss the fundamental limits and practical barriers to the on-going development of VLSI, including reliability and yield effects of scaling, hot electron trapping, soft errors, current density limitations, leakage and circuit design tradeoffs. The focus will be on technology, device and circuit considerations.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

自引率

0.00%

发文量