面向密度的汽车片上系统嵌入式存储器表征诊断数据压缩策略

Giorgio Insinga, M. Battilana, M. Coppetta, N. Mautone, G. Carnevale, M. Giltrelli, P. Scaramuzza, R. Ullmann
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引用次数: 0

摘要

汽车行业对嵌入式片上系统(SoC)内存的需求不断增长。因此,存储器占据了汽车SoC的很大一部分芯片面积,增加了嵌入式存储器内部的缺陷概率。汽车SoC制造商需要深入测试其嵌入式存储器,因为它们是其设备产量的重要贡献者之一。测试工作增加了新技术和新系列设备的特性,需要由制造商进行特性描述。这些测试产生了大量的诊断信息,对设计师和技术专家来说非常有价值。可以分析此诊断信息以识别和纠正可能的弱点和错误行为。收集内存诊断信息最简单的方法是使用故障位图,每个故障都保存为坐标。这个方法是最简单的解决方案。然而,记录每个故障的坐标可能会产生无法管理的数据量。当芯片上限制了可以保存或传输到外部世界的数据量时,这个问题就会加剧。本文提出了一种优化的片上压缩算法,该算法可以减少在嵌入式存储器测试期间存储诊断信息所需的片上存储器。该解决方案允许重构故障位图,生成嵌入式片上存储器中故障位密度的拓扑表示。所提出的方法有效地将所使用的存储空间减少到原始故障位图所使用的存储空间的一小部分。该算法使用基于坐标的方法,其中内存在逻辑上被划分为平均划分的扇区。该算法引入的小时间开销通过实现最佳空间利用率的能力得到补偿。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Density-oriented diagnostic data compression strategy for characterization of embedded memories in Automotive Systems-on-Chip
Embedded System-on-Chip (SoC) memory requirements in the Automotive industry are constantly growing. For this reason, memories occupy a significant part of Automotive SoC’s die area, increasing the defect probability inside the embedded storage. Automotive SoC manufacturers need to deeply test their embedded memories as they are one of the significant contributors to the yield of their devices. The test effort increases for the characterization of new technologies and new families of devices that need to be characterized by the manufacturers. These tests generate a massive quantity of diagnostic information that is incredibly valuable for designers and technology experts. This diagnostic information can be analyzed to identify and correct possible weaknesses and misbehavior. The easiest way to collect memory diagnostic information consists of failure bitmaps in which each fault is saved as coordinates. This method is the simplest solution to implement. However, logging the coordinates of every fault may generate an unmanageable quantity of data. This problem is exacerbated when there is an on-chip limitation on the amount of data that can be saved or transmitted to the external world.This paper presents an optimized on-chip compression algorithm that allows to reduce the required on-chip memory to store diagnostic information during embedded memory testing. This solution allows the reconstruction of a failure bitmap, generating a topological representation of the density of the failings bits in the embedded on-chip memory. The proposed approach effectively reduces the used storage to a fraction with respect to the one used by the original failing bitmap. The algorithm uses a coordinates-based approach, in which the memory is logically divided into equally divided sectors. The small time overhead introduced by the algorithm is compensated by the ability to achieve optimal space utilization.
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