{"title":"用于多处理器片上系统的安全、可扩展和低功耗结温传感","authors":"G. A. Kumar","doi":"10.1109/ISQED48828.2020.9136996","DOIUrl":null,"url":null,"abstract":"The measurement of silicon junction temperature is often required in embedded applications for monitoring and control, device protection and different types of temperature based compensation. The systems-on-chip (SoC) are growing complex these days with multiple processors and high degree of peripheral integration. Also the power consumption of the SoC requires being very low for battery operated or energy harvesting based embedded applications like Internet of Things (IoT). This paper describes the architecture, integration, programming model and working scheme of a silicon junction temperature sensing module that achieves security, scalability and low-power requirements for multi-processor SoCs.","PeriodicalId":225828,"journal":{"name":"2020 21st International Symposium on Quality Electronic Design (ISQED)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Secure, Scalable and Low-Power Junction Temperature Sensing for Multi-Processor Systems-on-Chip\",\"authors\":\"G. A. Kumar\",\"doi\":\"10.1109/ISQED48828.2020.9136996\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The measurement of silicon junction temperature is often required in embedded applications for monitoring and control, device protection and different types of temperature based compensation. The systems-on-chip (SoC) are growing complex these days with multiple processors and high degree of peripheral integration. Also the power consumption of the SoC requires being very low for battery operated or energy harvesting based embedded applications like Internet of Things (IoT). This paper describes the architecture, integration, programming model and working scheme of a silicon junction temperature sensing module that achieves security, scalability and low-power requirements for multi-processor SoCs.\",\"PeriodicalId\":225828,\"journal\":{\"name\":\"2020 21st International Symposium on Quality Electronic Design (ISQED)\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 21st International Symposium on Quality Electronic Design (ISQED)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED48828.2020.9136996\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 21st International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED48828.2020.9136996","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Secure, Scalable and Low-Power Junction Temperature Sensing for Multi-Processor Systems-on-Chip
The measurement of silicon junction temperature is often required in embedded applications for monitoring and control, device protection and different types of temperature based compensation. The systems-on-chip (SoC) are growing complex these days with multiple processors and high degree of peripheral integration. Also the power consumption of the SoC requires being very low for battery operated or energy harvesting based embedded applications like Internet of Things (IoT). This paper describes the architecture, integration, programming model and working scheme of a silicon junction temperature sensing module that achieves security, scalability and low-power requirements for multi-processor SoCs.