Si/PLZT Smart Spatial Light Modulator Consisting Of Direct-bonded Driver Circuit And Flip-chip Bonded Processor

Si/PLZT Smart spatial light modulators (S-SLM’s) offer potential benefits due to the maturity of silicon technologies and the high-speed high-contrast optical modulation capability of PLZT. The voltage incompatibility between the driver circuit (operating at 2 20 V) required to drive the PLZT modulators and logic circuits (operating at 5 V) can be eliminated by physically separating the two circuits as illustrated in Fig. 1. The MOS-transistor driver circuit is fabricated on a siliconon-insulator (SOI) silicon wafer. The device layers (-2.0 pm thick) is isolated by back-etching the Si substrate away. The isolated device layer is then bonded and connected to a PLZT substrate where the modulators are formed. A foundry processed silicon chip which contains the logic processing circuits and detectors for the optical input is flip-chip bonded to the modulator assembly to finalize the Si/PLZT S-SLM. We first applied direct bonding technology to realize an 8 x 8 array of individually addressable SLM shown in photomicrograph in Fig. 2 (a) (b). Each cell in this array contains an individually-addressable driver circuit (0 20 V output) controlled with a 0 5 V input signal. Since the direct-bonding step is applied after the circuits have been fabricated, any conventional Si processing step may be applied during the circuit fabrication. We have also demonstrated that the direct bonding techniques can be applied to large areas (> 100 “2) with high yields.’-2 In order to endow the pixels with more “smart” functionality, two foundry-processed chips (see photomicrographs in Figs. 3(a) (b)) were flip-chip bonded to separate direct-bonded Si / PLZT SLM structures as a second step. In addition to the logic circuits, these chips also contain arrays of Si detector and supporting circuit, such as signal amplifiers, to add optical input capability to the smart pixels. One of the chips is intended for data processing applications and performs the primitive function for pattern matching. The other chip is designed for multiprocessor interconnection networks and ATM switching and performs controlled routing of multiple inputs to multiple outputs. Characterization of the resultant S-SLM’s will be presented at the conference. This technology combining foundry-processed logic chips with PLZT modulators offers a unique way to realize S-SLM’s with high optical performance and complex logic functionality.