{"title":"低电压有机薄膜晶体管与减少子间隙DOS的功率高效逻辑电路","authors":"J. Zhao, W. Tang, P. Yu, X. Guo","doi":"10.1109/CAD-TFT.2016.7785046","DOIUrl":null,"url":null,"abstract":"Circuit performance of low voltage organic thinfilm transistors (OTFTs) using two different approaches including enlarging the gate dielectric capacitance with large permittivity (high-k) gate dielectric material and reducing the sub-gap density-of-states (DOS) at the channel two different approaches were compared by device and circuit hybrid simulations. The simulation results show that low-voltage OTFTs with reduced sub-gap DOS strategy can help to achieve faster and more power efficient circuits.","PeriodicalId":303429,"journal":{"name":"2016 7th International Conference on Computer Aided Design for Thin-Film Transistor Technologies (CAD-TFT)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Low voltage organic thin-film transistor with reduced sub-gap DOS for power efficient logic circuits\",\"authors\":\"J. Zhao, W. Tang, P. Yu, X. Guo\",\"doi\":\"10.1109/CAD-TFT.2016.7785046\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Circuit performance of low voltage organic thinfilm transistors (OTFTs) using two different approaches including enlarging the gate dielectric capacitance with large permittivity (high-k) gate dielectric material and reducing the sub-gap density-of-states (DOS) at the channel two different approaches were compared by device and circuit hybrid simulations. The simulation results show that low-voltage OTFTs with reduced sub-gap DOS strategy can help to achieve faster and more power efficient circuits.\",\"PeriodicalId\":303429,\"journal\":{\"name\":\"2016 7th International Conference on Computer Aided Design for Thin-Film Transistor Technologies (CAD-TFT)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 7th International Conference on Computer Aided Design for Thin-Film Transistor Technologies (CAD-TFT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CAD-TFT.2016.7785046\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 7th International Conference on Computer Aided Design for Thin-Film Transistor Technologies (CAD-TFT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAD-TFT.2016.7785046","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low voltage organic thin-film transistor with reduced sub-gap DOS for power efficient logic circuits
Circuit performance of low voltage organic thinfilm transistors (OTFTs) using two different approaches including enlarging the gate dielectric capacitance with large permittivity (high-k) gate dielectric material and reducing the sub-gap density-of-states (DOS) at the channel two different approaches were compared by device and circuit hybrid simulations. The simulation results show that low-voltage OTFTs with reduced sub-gap DOS strategy can help to achieve faster and more power efficient circuits.