基本互连网络拓扑的延迟建模比较

1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105) Pub Date : 1998-10-21 DOI:10.1109/ICSICT.1998.785923

S. Lingling, Yan Xiaolang, Wang Junhu, Cai Miaohua

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引用次数: 1

摘要

本文试图比较几种互连延迟建模方法。给出了不同互连延迟分析的结果，并与SPICE仿真结果进行了比较，用于测试基本互连网络拓扑结构。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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The comparison of delay modeling for basic interconnect net topologies

This paper makes an attempt to compare several methods of interconnect delay modelling. The results of different interconnect delay analyses are given and compared with SPICE simulation results for testing basic interconnect net topology.

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1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

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