{"title":"SIMD架构上的递归过滤","authors":"R. Schaffer, M. Hosemann, R. Merker, G. Fettweis","doi":"10.1109/SIPS.2003.1235680","DOIUrl":null,"url":null,"abstract":"Recursive filters are used frequently in digital signal processing. They can be implemented in dedicated hardware or in software on a digital signal processor (DSP). Software. solutions often are preferable for their speed of implementation and flexibility. However, contemporary DSPs are mostly not fast enough to perform filtering for high data-rates or large filters. A method to increase the computational power of a DSP without sacrificing efficiency is to use multiple processor elements controlled by the single-instruction multiple-data (SIMD) paradigm. The parallelization of recursive algorithms is difficult, because of the data dependencies. We use design methods for parallel processor arrays to realize implementations that can be used on a parallel DSP. Further, we focus on the partitioning of the algorithm so that the realization can be used for different architectures. Consequences for the architecture are also considered. The infinite impulse response (IIR) filter, the most familiar recursive filter, is used in the description of the design process.","PeriodicalId":173186,"journal":{"name":"2003 IEEE Workshop on Signal Processing Systems (IEEE Cat. No.03TH8682)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Recursive filtering on SIMD architectures\",\"authors\":\"R. Schaffer, M. Hosemann, R. Merker, G. Fettweis\",\"doi\":\"10.1109/SIPS.2003.1235680\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recursive filters are used frequently in digital signal processing. They can be implemented in dedicated hardware or in software on a digital signal processor (DSP). Software. solutions often are preferable for their speed of implementation and flexibility. However, contemporary DSPs are mostly not fast enough to perform filtering for high data-rates or large filters. A method to increase the computational power of a DSP without sacrificing efficiency is to use multiple processor elements controlled by the single-instruction multiple-data (SIMD) paradigm. The parallelization of recursive algorithms is difficult, because of the data dependencies. We use design methods for parallel processor arrays to realize implementations that can be used on a parallel DSP. Further, we focus on the partitioning of the algorithm so that the realization can be used for different architectures. Consequences for the architecture are also considered. The infinite impulse response (IIR) filter, the most familiar recursive filter, is used in the description of the design process.\",\"PeriodicalId\":173186,\"journal\":{\"name\":\"2003 IEEE Workshop on Signal Processing Systems (IEEE Cat. No.03TH8682)\",\"volume\":\"93 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 IEEE Workshop on Signal Processing Systems (IEEE Cat. No.03TH8682)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.2003.1235680\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE Workshop on Signal Processing Systems (IEEE Cat. No.03TH8682)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2003.1235680","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Recursive filters are used frequently in digital signal processing. They can be implemented in dedicated hardware or in software on a digital signal processor (DSP). Software. solutions often are preferable for their speed of implementation and flexibility. However, contemporary DSPs are mostly not fast enough to perform filtering for high data-rates or large filters. A method to increase the computational power of a DSP without sacrificing efficiency is to use multiple processor elements controlled by the single-instruction multiple-data (SIMD) paradigm. The parallelization of recursive algorithms is difficult, because of the data dependencies. We use design methods for parallel processor arrays to realize implementations that can be used on a parallel DSP. Further, we focus on the partitioning of the algorithm so that the realization can be used for different architectures. Consequences for the architecture are also considered. The infinite impulse response (IIR) filter, the most familiar recursive filter, is used in the description of the design process.