{"title":"交叉点元素:交叉点元素(EC)","authors":"A. Altadill, I. Carretero, M. Escudero, P. Mateos","doi":"10.1109/EASIC.1990.207930","DOIUrl":null,"url":null,"abstract":"The VLSI integrated circuit \"Elemento de Cruce\" (EC) has been conceived as a multifunction device. The EC has been designed to work as the crosspoint element in a broadband (ATM) asynchronous transfer mode (ATM) switch block, as well as an interfacing device between a microprocessor, a codec or, in general, any data source and the ATM switch network. The EC works at a frequency of 43.75 MHz using a 16 bit parallel data format, giving a throughput of 700 Mbs. The chip is implemented with 13 K CMOS gates, 4 kbits of RAM memory and 25.5 kbits of FIFO memory. The IC is manufactured in 1.25 mu m twin-tub double metal level standard cell CMOS technology and has dimensions of 400 mils*400 mils, with nominal power dissipation of 1.3 W.<<ETX>>","PeriodicalId":205695,"journal":{"name":"[Proceedings] EURO ASIC `90","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Crosspoint element: Elemento de Cruce (EC)\",\"authors\":\"A. Altadill, I. Carretero, M. Escudero, P. Mateos\",\"doi\":\"10.1109/EASIC.1990.207930\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The VLSI integrated circuit \\\"Elemento de Cruce\\\" (EC) has been conceived as a multifunction device. The EC has been designed to work as the crosspoint element in a broadband (ATM) asynchronous transfer mode (ATM) switch block, as well as an interfacing device between a microprocessor, a codec or, in general, any data source and the ATM switch network. The EC works at a frequency of 43.75 MHz using a 16 bit parallel data format, giving a throughput of 700 Mbs. The chip is implemented with 13 K CMOS gates, 4 kbits of RAM memory and 25.5 kbits of FIFO memory. The IC is manufactured in 1.25 mu m twin-tub double metal level standard cell CMOS technology and has dimensions of 400 mils*400 mils, with nominal power dissipation of 1.3 W.<<ETX>>\",\"PeriodicalId\":205695,\"journal\":{\"name\":\"[Proceedings] EURO ASIC `90\",\"volume\":\"58 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-05-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] EURO ASIC `90\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EASIC.1990.207930\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] EURO ASIC `90","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EASIC.1990.207930","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
VLSI集成电路“elelento de Cruce”(EC)被认为是一种多功能器件。EC被设计为宽带(ATM)异步传输模式(ATM)交换模块中的交叉点元件，以及微处理器、编解码器或一般情况下任何数据源与ATM交换网络之间的接口设备。EC的工作频率为43.75 MHz，采用16位并行数据格式，吞吐量为700 mb。该芯片由13 K CMOS门、4 kb RAM存储器和25.5 kb FIFO存储器实现。该IC采用1.25 μ m双槽双金属级标准电池CMOS技术制造，尺寸为400 mils*400 mils，标称功耗为1.3 w。
The VLSI integrated circuit "Elemento de Cruce" (EC) has been conceived as a multifunction device. The EC has been designed to work as the crosspoint element in a broadband (ATM) asynchronous transfer mode (ATM) switch block, as well as an interfacing device between a microprocessor, a codec or, in general, any data source and the ATM switch network. The EC works at a frequency of 43.75 MHz using a 16 bit parallel data format, giving a throughput of 700 Mbs. The chip is implemented with 13 K CMOS gates, 4 kbits of RAM memory and 25.5 kbits of FIFO memory. The IC is manufactured in 1.25 mu m twin-tub double metal level standard cell CMOS technology and has dimensions of 400 mils*400 mils, with nominal power dissipation of 1.3 W.<>
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