R. Sakurai, Mizuki Takahashi, A. Kay, A. Yamada, T. Fujimoto, T. Kambe
{"title":"Bach硬件编译器中同步通信的调度方法","authors":"R. Sakurai, Mizuki Takahashi, A. Kay, A. Yamada, T. Fujimoto, T. Kambe","doi":"10.1109/ASPDAC.1999.759993","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a scheduling method for synchronous communication between threads in the Bach hardware compiler. In this method, all communications are extracted from a behavioral Bach-C description and statically prescheduled to synchronize communications between threads if possible. Then all the operations and communications of each thread are synthesized independently according to the prescheduling result. Consequently, we can synthesize large system LSIs efficiently, because we do not need to synthesize the whole system descriptions at once to synchronize communications. Experimental results show that our method improves throughput of synthesized circuits and is applicable to large systems designed with the Bach hardware compiler.","PeriodicalId":201352,"journal":{"name":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A scheduling method for synchronous communication in the Bach hardware compiler\",\"authors\":\"R. Sakurai, Mizuki Takahashi, A. Kay, A. Yamada, T. Fujimoto, T. Kambe\",\"doi\":\"10.1109/ASPDAC.1999.759993\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a scheduling method for synchronous communication between threads in the Bach hardware compiler. In this method, all communications are extracted from a behavioral Bach-C description and statically prescheduled to synchronize communications between threads if possible. Then all the operations and communications of each thread are synthesized independently according to the prescheduling result. Consequently, we can synthesize large system LSIs efficiently, because we do not need to synthesize the whole system descriptions at once to synchronize communications. Experimental results show that our method improves throughput of synthesized circuits and is applicable to large systems designed with the Bach hardware compiler.\",\"PeriodicalId\":201352,\"journal\":{\"name\":\"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-01-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1999.759993\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1999.759993","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A scheduling method for synchronous communication in the Bach hardware compiler
In this paper, we propose a scheduling method for synchronous communication between threads in the Bach hardware compiler. In this method, all communications are extracted from a behavioral Bach-C description and statically prescheduled to synchronize communications between threads if possible. Then all the operations and communications of each thread are synthesized independently according to the prescheduling result. Consequently, we can synthesize large system LSIs efficiently, because we do not need to synthesize the whole system descriptions at once to synchronize communications. Experimental results show that our method improves throughput of synthesized circuits and is applicable to large systems designed with the Bach hardware compiler.