{"title":"空间矢量调制三相三电平九开关逆变器的分析、设计与仿真","authors":"E. Mahrous, N. Rahim, P. Hew","doi":"10.1109/IWSOC.2006.348225","DOIUrl":null,"url":null,"abstract":"This paper presents an analysis and design procedure of a three-phase three-level nine switches voltage source inverter using the space vector pulse width modulation (SVPWM) control scheme. The proposed inverter consists from a main inverter switches Q<sub>1</sub>, Q<sub>2 </sub>, Q<sub>3</sub>, Q<sub>4</sub>, Q<sub>5</sub> and Q<sub>6</sub>, an auxiliary three bidirectional switches S<sub>1</sub> S<sub>2</sub>, and S<sub>3</sub> and two capacitor banks C<sub>1</sub> and C<sub>2</sub>. Where ideal switches and diodes will be assumed and the dc bus capacitor bank voltages fluctuations will be absent. The effectiveness of the SVPWM control scheme is verified by the simulations results in the worst case where two very low switching frequencies values of 1 kHz and 5 kHz will be considered","PeriodicalId":134742,"journal":{"name":"2006 6th International Workshop on System on Chip for Real Time Applications","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Analysis Design and Simulation of a Three-Phase Three-Level Nine Switches Inverter Using Space Vector Modulation\",\"authors\":\"E. Mahrous, N. Rahim, P. Hew\",\"doi\":\"10.1109/IWSOC.2006.348225\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an analysis and design procedure of a three-phase three-level nine switches voltage source inverter using the space vector pulse width modulation (SVPWM) control scheme. The proposed inverter consists from a main inverter switches Q<sub>1</sub>, Q<sub>2 </sub>, Q<sub>3</sub>, Q<sub>4</sub>, Q<sub>5</sub> and Q<sub>6</sub>, an auxiliary three bidirectional switches S<sub>1</sub> S<sub>2</sub>, and S<sub>3</sub> and two capacitor banks C<sub>1</sub> and C<sub>2</sub>. Where ideal switches and diodes will be assumed and the dc bus capacitor bank voltages fluctuations will be absent. The effectiveness of the SVPWM control scheme is verified by the simulations results in the worst case where two very low switching frequencies values of 1 kHz and 5 kHz will be considered\",\"PeriodicalId\":134742,\"journal\":{\"name\":\"2006 6th International Workshop on System on Chip for Real Time Applications\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 6th International Workshop on System on Chip for Real Time Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2006.348225\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 6th International Workshop on System on Chip for Real Time Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2006.348225","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis Design and Simulation of a Three-Phase Three-Level Nine Switches Inverter Using Space Vector Modulation
This paper presents an analysis and design procedure of a three-phase three-level nine switches voltage source inverter using the space vector pulse width modulation (SVPWM) control scheme. The proposed inverter consists from a main inverter switches Q1, Q2 , Q3, Q4, Q5 and Q6, an auxiliary three bidirectional switches S1 S2, and S3 and two capacitor banks C1 and C2. Where ideal switches and diodes will be assumed and the dc bus capacitor bank voltages fluctuations will be absent. The effectiveness of the SVPWM control scheme is verified by the simulations results in the worst case where two very low switching frequencies values of 1 kHz and 5 kHz will be considered
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