Xilinx 7nm VersalTM多核标量处理系统(PS)的中子和64MeV质子表征

P. Maillard, Y. P. Chen, Jue Arver, Venkatesh Merugu, Ava Shui, M. Voogel
{"title":"Xilinx 7nm VersalTM多核标量处理系统(PS)的中子和64MeV质子表征","authors":"P. Maillard, Y. P. Chen, Jue Arver, Venkatesh Merugu, Ava Shui, M. Voogel","doi":"10.1109/REDW56037.2022.9921497","DOIUrl":null,"url":null,"abstract":"This paper presents the single event response of Xilinx’s 7nm Versal ACAP dual R5 and dual A72 ARM core processor (PS). The PS was evaluating using Xilinx System Validation Tool (SVT) design suite. Accelerated SEU beam test of a XCVC1902 device was performed using the 64MeV Proton source at Crocker Nuclear Laboratory (CNL) and at LANSCE. More than 5 million designs exercising covering all the PS power domains were generated. Single-event characterization results are presented and categorized in terms of detectability and correctability. Beam test results show that the overall Processor System (PS) SEFI FIT is $\\sim0.2$ at NYC sea level, with all safety mechanisms enabled and no uncorrectable events were observed in the PS caches and RAMs.","PeriodicalId":202271,"journal":{"name":"2022 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with 2022 NSREC)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Neutron and 64MeV Proton Characterization of Xilinx 7nm VersalTM Multicore Scalar Processing System (PS)\",\"authors\":\"P. Maillard, Y. P. Chen, Jue Arver, Venkatesh Merugu, Ava Shui, M. Voogel\",\"doi\":\"10.1109/REDW56037.2022.9921497\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the single event response of Xilinx’s 7nm Versal ACAP dual R5 and dual A72 ARM core processor (PS). The PS was evaluating using Xilinx System Validation Tool (SVT) design suite. Accelerated SEU beam test of a XCVC1902 device was performed using the 64MeV Proton source at Crocker Nuclear Laboratory (CNL) and at LANSCE. More than 5 million designs exercising covering all the PS power domains were generated. Single-event characterization results are presented and categorized in terms of detectability and correctability. Beam test results show that the overall Processor System (PS) SEFI FIT is $\\\\sim0.2$ at NYC sea level, with all safety mechanisms enabled and no uncorrectable events were observed in the PS caches and RAMs.\",\"PeriodicalId\":202271,\"journal\":{\"name\":\"2022 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with 2022 NSREC)\",\"volume\":\"85 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with 2022 NSREC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/REDW56037.2022.9921497\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with 2022 NSREC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/REDW56037.2022.9921497","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

本文介绍了赛灵思7nm通用ACAP双R5和双A72 ARM核心处理器(PS)的单事件响应。使用Xilinx系统验证工具(SVT)设计套件对PS进行评估。在Crocker核实验室(CNL)和LANSCE的64MeV质子源上对XCVC1902装置进行了加速SEU束流试验。产生了超过500万份设计,涵盖了所有PS功率域。单事件表征结果提出和分类的可检测性和可纠正性。波束测试结果显示,在纽约市海平面,处理器系统(PS)的整体SEFI FIT为$\sim0.2$,所有安全机制都已启用,并且在PS缓存和ram中没有观察到不可纠正的事件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Neutron and 64MeV Proton Characterization of Xilinx 7nm VersalTM Multicore Scalar Processing System (PS)
This paper presents the single event response of Xilinx’s 7nm Versal ACAP dual R5 and dual A72 ARM core processor (PS). The PS was evaluating using Xilinx System Validation Tool (SVT) design suite. Accelerated SEU beam test of a XCVC1902 device was performed using the 64MeV Proton source at Crocker Nuclear Laboratory (CNL) and at LANSCE. More than 5 million designs exercising covering all the PS power domains were generated. Single-event characterization results are presented and categorized in terms of detectability and correctability. Beam test results show that the overall Processor System (PS) SEFI FIT is $\sim0.2$ at NYC sea level, with all safety mechanisms enabled and no uncorrectable events were observed in the PS caches and RAMs.
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